Abstract: Techniques are disclosed for reducing impact of a repair action in a switch fabric. In one embodiment, a server system is provided that includes a first interposer card that operatively connects one or more server cards to a midplane. The first interposer card may include a switch module that switches network traffic for the one or more server cards. The first interposer card may be hot-swappable from the midplane, and the one or more server cards may be hot-swappable from the first interposer card.

Abstract: Techniques are disclosed for reducing impact of a repair action in a switch fabric. In one embodiment, a server system is provided that includes a first interposer card that operatively connects one or more server cards to a midplane. The first interposer card may include a switch module that switches network traffic for the one or more server cards. The first interposer card may be hot-swappable from the midplane, and the one or more server cards may be hot-swappable from the first interposer card.

Abstract: Techniques are disclosed for reducing impact of a repair action in a switch fabric. In one embodiment, a server system is provided that includes a first interposer card that operatively connects one or more server cards to a midplane. The first interposer card may include a switch module that switches network traffic for the one or more server cards. The first interposer card may be hot-swappable from the midplane, and the one or more server cards may be hot-swappable from the first interposer card.

Abstract: Design structures embodied in machine readable medium are provided. Embodiments of the design structures include a multimodal memory controller comprising: a transceiver circuit having at least one internal signal line, a first external signal line, a second external signal line, and a mode control signal line, the mode control signal line having asserted upon it a mode control signal, and the transceiver circuit configured to operate the external signal lines for single-ended signaling at a first voltage when the mode control signal is a first value and to operate the external signal lines for differential signaling at a second voltage when the mode control signal is a second value.

Abstract: Multimodal memory controllers are disclosed that include: a transceiver circuit having at least one internal signal line, a first external signal line, a second external signal line, and a mode control signal line, the mode control signal line having asserted upon it a mode control signal, and the transceiver circuit configured to operate the external signal lines for single-ended signaling at a first voltage when the mode control signal is a first value and to operate the external signal lines for differential signaling at a second voltage when the mode control signal is a second value.

Abstract: Switching characteristics of system components are represented and summed so that their effects on the overall system can be observed during the design process. Full simultaneous switching analysis is provided at the earliest levels of design containing minimal level of design data by a method of computing net based simultaneous switching noise levels which supports packages ranging from the smallest chip level to the largest board level. The simultaneous switching activity is computed based on interaction between each driver and each other driver between each component and each other component, with consideration to the spatial inter-relationship net, within a higher level component, to determine each component's drivers effect on itself as well as the coupling effect between drivers on different components. The analysis involves computing simultaneous switching noise by associating a characteristic triangle with each driver application configuration. The characteristic triangle.

Abstract: A subpicosecond solid state optical correlator based on interference induced carrier modulation includes a photosensor circuit having a photoconductive element and a pair of opposed electrodes. A voltage difference is created across the electrodes to define an electrical field direction, and the element operates to generate charge carriers in response to optical energy incident on the photoconductive element. First and second optical signals are directed onto the photoconductive element to form an interference pattern thereon when the signals overlap in time and space. This interference pattern produces spatial modulation of the distribution of the carriers into lines or planes, at least some of which are not parallel to the electrical field direction. The resulting photocurrent is monitored to detect a parameter associated with the presence or absence of the interference pattern.