Patents by Inventor Bradley H. Smith

Bradley H. Smith has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20170176523
    Abstract: Existing multi-wire debugging protocols, such as 4-wire JTAG, 2-wire cJTAG, or ARM SWD, are run through a serial wireless link by providing the debugger and the target device with hardware interfaces that include UARTs and conversion bridges. The debugger interface serializes outgoing control signals and de-serializes returning data. The target interface de-serializes incoming control signals and serializes outgoing data. The actions of the interfaces are transparent to the inner workings of the devices, allowing re-use of existing debugging software. Compression, signal combining, and other optional enhancements increase debugging speed and flexibility while wirelessly accessing target devices that may be too small, too difficult to reach, or too seal-dependent for a wired connection.
    Type: Application
    Filed: December 18, 2015
    Publication date: June 22, 2017
    Inventors: Sankaran M. Menon, Bradley H. Smith, Jinshi Huang, Rolf H. Kuehnis
  • Patent number: 9686027
    Abstract: Disclosed is a method and apparatus for validating a two-way satellite communication system in an aircraft. The two-way satellite communication system may include a network access unit, a modem, and a satellite antenna assembly. A satellite link emulator may be disposed proximate the aircraft. A validation controller may initiate a validation test of the two-way satellite communication system using the satellite link emulator, including receiving, at the satellite link emulator, a transmitted uplink signal from the satellite antenna assembly, and transmitting, using the satellite link emulator, a downlink signal to the satellite antenna assembly in response to the received uplink signal. A pass/fail indication may be determined based on operation of the network access unit, the modem, and the satellite antenna assembly during the validation test.
    Type: Grant
    Filed: May 20, 2015
    Date of Patent: June 20, 2017
    Assignee: VIASAT, INC.
    Inventors: Alex Yeshanov, Eric L Cross, Bradley H Smith, Ian F Winfield
  • Patent number: 9680199
    Abstract: A multiple-antenna positioning system with a single drive element, providing reduced weight and complexity over systems that have a drive element for each antenna. In certain examples, each antenna can be coupled with a rotating spindle, with each antenna spindle being coupled with a pair of link arms. By driving a single drive spindle, each of the antenna spindles in the system can be rotated by the associated pair of link arms. The link arms can have an adjustable length, such as through a turnbuckle mechanism, to reduce backlash in the system, and in some examples can apply a preload to the system. By reducing backlash, the multiple antenna positioning system can have improved responsiveness to a rotation of the single drive element, as well as improved stability of the positioning of each antenna when the drive element is held in a fixed position.
    Type: Grant
    Filed: June 26, 2015
    Date of Patent: June 13, 2017
    Assignee: ViaSat, Inc.
    Inventors: Jack C. Newkirk, B. Wayne Holt, Bradley H. Smith, Kevin M. Skinner, E. Mitchell Blalock
  • Publication number: 20170041088
    Abstract: Disclosed is a method and apparatus for validating a two-way satellite communication system in an aircraft. The two-way satellite communication system may include a network access unit, a modem, and a satellite antenna assembly. A satellite link emulator may be disposed proximate the aircraft. A validation controller may initiate a validation test of the two-way satellite communication system using the satellite link emulator, including receiving, at the satellite link emulator, a transmitted uplink signal from the satellite antenna assembly, and transmitting, using the satellite link emulator, a downlink signal to the satellite antenna assembly in response to the received uplink signal. A pass/fail indication may be determined based on operation of the network access unit, the modem, and the satellite antenna assembly during the validation test.
    Type: Application
    Filed: May 20, 2015
    Publication date: February 9, 2017
    Inventors: Alex Yeshanov, Eric L Cross, Bradley H Smith, Ian F Winfield
  • Publication number: 20150380802
    Abstract: A multiple-antenna positioning system with a single drive element, providing reduced weight and complexity over systems that have a drive element for each antenna. In certain examples, each antenna can be coupled with a rotating spindle, with each antenna spindle being coupled with a pair of link arms. By driving a single drive spindle, each of the antenna spindles in the system can be rotated by the associated pair of link arms. The link arms can have an adjustable length, such as through a turnbuckle mechanism, to reduce backlash in the system, and in some examples can apply a preload to the system. By reducing backlash, the multiple antenna positioning system can have improved responsiveness to a rotation of the single drive element, as well as improved stability of the positioning of each antenna when the drive element is held in a fixed position.
    Type: Application
    Filed: June 26, 2015
    Publication date: December 31, 2015
    Inventors: Jack C. Newkirk, B. Wayne Holt, Bradley H. Smith, Kevin M. Skinner, E. Mitchell Blalock
  • Patent number: 6163539
    Abstract: A datapath packet transmission controller which includes a central processing unit (CPU), a transmit FIFO buffer operative to receive and temporarily store data packets, and a disposition FIFO buffer coupled to said CPU for holding packet disposition commands received from said CPU. The CPU controls reception and storage of data packets in the transmit FIFO buffer, accesses data in data packets in the transmit FIFO buffer, provides disposition commands which control the disposition of packets after storage in the transmit FIFO buffer.
    Type: Grant
    Filed: April 28, 1998
    Date of Patent: December 19, 2000
    Assignee: PMC-Sierra Ltd.
    Inventors: Thomas Alexander, Bradley H. Smith, Alexander D. Rekow
  • Patent number: 5909564
    Abstract: An Ethernet switch which includes a plurality of medium access control (MAC) interface logic circuits each coupled to an associated output port operative to perform serial-to-parallel conversion for frames being received from an associated output port and parallel-to-serial conversion for frames being transferred to an associated output port and other interfacing functions. The switch has an internal bus, a buffer memory coupled to each of the MAC interface logic circuits at one end and to the internal bus at another end, a switch central processor coupled to the internal bus and a multi-channel Direct Memory Access (DMA) Controller coupled to the internal bus and to the switch central processor, operative to transfer incoming frames to an external memory and to transfer frames stored temporarily in external memory to their destination in accordance with instructions from the switch central processor. An external memory controller is coupled to the DMA Controller and to an external memory port.
    Type: Grant
    Filed: March 27, 1997
    Date of Patent: June 1, 1999
    Assignee: PMC-Sierra Ltd.
    Inventors: Thomas Alexander, Bradley H. Smith, Calvin S. Taylor