Abstract: A single-ended to differential converter uses a cross-coupled latch that maximizes the output zero-crossing symmetry and is self compensating over PVT variations. An in-phase driving signal is provided by an always-on transmission gate coupled to the input. An out-of-phase driving signal is provided by an inverter coupled to the input. The in-phase and out-of-phase driving signals each drive an input of the cross-coupled latch. The in-phase driving signal from the always-on transmission gate starts to bring the cross-coupled latch into conduction, and when the out-of-phase driving signal arrives, the simultaneous driving of the cross-coupled latch causes a rapid and symmetric transition of both outputs of the cross-coupled latch.

Abstract: A differential receiver uses an operational trans-conductance amplifier (OTA) to bias the common mode output voltage of the input stage to an inverter threshold voltage, Vth. Large-gate N-MOS transistors are used to provide the bias, and thin-gate NMOS transistors are used as the input switching transistors. A double cross-coupled latch creates a high-gain configuration for small differential signals and limits the gain and swing non-linearly for large signals, without imposing a large transition delay. Matched resistors between the outputs of the double cross-coupled latch provides a measure of the common-mode output voltage of the input stage, and an inverter with input shorted to output provides a measure of an inverter threshold voltage Vth. The OTA compares the measure of the common-mode output voltage and measure of the inverter threshold voltage, and provides a control current to the large-gate NMOS transistors to maintain the mid-point of the common-mode output voltage at a constant voltage.