Patents by Inventor Bradley Michael Waters

Bradley Michael Waters has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10223253
    Abstract: A memory allocation system is provided and includes nodes, one or more memories, and an allocation interface. Each of the nodes includes a respective set of processors. The one or more memories include memory elements for storing threads. The memory elements refer to respective portions of the one or more memories and are accessible to at least one of the nodes. The allocation interface is configured to allocate the memory elements to lockless list structures. Each of the lockless list structures is allocated to a respective set of the memory elements. The lockless list structures are partitioned for the processors. The allocation interface is configured to receive requests from the processors for the memory elements and adjust allocation of the memory elements between the lockless list structures according to a balancing metric.
    Type: Grant
    Filed: May 15, 2017
    Date of Patent: March 5, 2019
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Amol Dilip Dixit, Bradley Michael Waters
  • Publication number: 20170249243
    Abstract: A memory allocation system is provided and includes nodes, one or more memories, and an allocation interface. Each of the nodes includes a respective set of processors. The one or more memories include memory elements for storing threads. The memory elements refer to respective portions of the one or more memories and are accessible to at least one of the nodes. The allocation interface is configured to allocate the memory elements to lockless list structures. Each of the lockless list structures is allocated to a respective set of the memory elements. The lockless list structures are partitioned for the processors. The allocation interface is configured to receive requests from the processors for the memory elements and adjust allocation of the memory elements between the lockless list structures according to a balancing metric.
    Type: Application
    Filed: May 15, 2017
    Publication date: August 31, 2017
    Inventors: Amol Dilip Dixit, Bradley Michael Waters
  • Patent number: 9652289
    Abstract: Systems and techniques of the management of the allocation of a plurality of memory elements stored within a plurality of lockless list structures are presented. These lockless list structures (such as Slists) may be made accessible within an operating system environment of a multicore processor—and may be partitioned within the system. Memory elements may also be partitioned among these lockless list structures. When a core processor (or other processing element) makes a request for allocating a memory element to itself, the system and/or method may search among the lockless list structures for an available memory element. When a suitable and/or available memory element is found, the system may allocate the available memory element to requesting core processor. Dynamically balancing of memory elements may occur according to a suitable balancing metric, such as maintain substantial numerical equality of memory elements or avoid over-allocation of resources.
    Type: Grant
    Filed: April 27, 2012
    Date of Patent: May 16, 2017
    Assignee: MICROSOFT TECHNOLOGY LICENSING, LLC
    Inventors: Amol Dilip Dixit, Bradley Michael Waters
  • Publication number: 20130290667
    Abstract: Systems and techniques of the management of the allocation of a plurality of memory elements stored within a plurality of lockless list structures are presented. These lockless list structures (such as Slists) may be made accessible within an operating system environment of a multicore processor—and may be partitioned within the system. Memory elements may also be partitioned among these lockless list structures. When a core processor (or other processing element) makes a request for allocating a memory element to itself, the system and/or method may search among the lockless list structures for an available memory element. When a suitable and/or available memory element is found, the system may allocate the available memory element to requesting core processor. Dynamically balancing of memory elements may occur according to a suitable balancing metric, such as maintain substantial numerical equality of memory elements or avoid over-allocation of resources.
    Type: Application
    Filed: April 27, 2012
    Publication date: October 31, 2013
    Applicant: MICROSOFT CORPORATION
    Inventors: Amol Dilip Dixit, Bradley Michael Waters
  • Patent number: 6493837
    Abstract: An event tracing program generally receives performance data about an event occurring on the computer system from a data producer program. The event tracing program responds by recording the event performance data in one of a set of a log buffers. When a log buffer becomes full, the event tracing program places the log buffer on a buffer flush list. The filled buffer is then written out to a more permanent storage medium, such as a disk. From time to time, the event tracing program may also transfer a buffer to the flush list prior to becoming full after a time-out period. To prevent a buffer from being flushed while event performance data is being recorded in the buffer, a reference count is incremented prior to the record operation to signify that the buffer is currently being modified. For high performance on multiprocessor systems, the buffers are allocated per processor to minimize data sharing among processors.
    Type: Grant
    Filed: July 16, 1999
    Date of Patent: December 10, 2002
    Assignee: Microsoft Corporation
    Inventors: Jee Fung Pang, Bradley Michael Waters