Patents by Inventor Brandon Barney

Brandon Barney has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220330733
    Abstract: A folding pillow includes a top pillow section and a bottom pillow section. The top pillow section includes a first access opening, and a first internal pillow insert. The bottom pillow section includes a second access opening, and a second internal pillow insert. The folding pillow also includes a hinge section, where the folding pillow is configured to fold at the hinge section and have a folded position and an unfold position. The folding pillow also includes a sleeping panel, where the sleeping panel is covered when the folding pillow is in the folded position.
    Type: Application
    Filed: April 18, 2022
    Publication date: October 20, 2022
    Inventors: Jay Davis, Damian Dayton, Brandon Barney
  • Patent number: 7822895
    Abstract: Described is an electronics enclosure having a midplane, a first field-replaceable CPU (central processing unit) module, and a second field-replaceable CPU module. Each CPU module is independently pluggable into and removable from the midplane. Each CPU module is configurable into either one of a first configuration and a second configuration, wherein the CPU modules operate independently as separate CPU modules when configured according to the first configuration and cooperate as a unitary CPU module when configured according to the second configuration.
    Type: Grant
    Filed: December 28, 2007
    Date of Patent: October 26, 2010
    Assignee: EMC Corporation
    Inventors: Steven D. Sardella, Kenneth Sullivan, Brandon Barney
  • Patent number: 7423859
    Abstract: An apparatus for protecting electronic equipment from voltage surges includes a network interface coupled to a computer device for connecting the computer device to a computer network and a discrete voltage surge protection device coupled to the computer network with a first unshielded cable and to the network interface with a second unshielded cable. The unshielded cable comprises at least one wire pair and the discrete protection device comprises a voltage suppressor device coupled between the wires of each wire pair. The discrete voltage surge protection device renders the apparatus compliant with the Telcordia (Bellcore) GR-1089-CORE Intrabuilding Lightning Surge Tests.
    Type: Grant
    Filed: September 29, 2004
    Date of Patent: September 9, 2008
    Assignee: EMC Corporation
    Inventors: Robert P. Wierzbicki, Brandon Barney
  • Patent number: 7321948
    Abstract: Boards in a system are interconnected by a first set of signals including a first control signal and first function signals. Each board in the system includes a second set of signals corresponding to the first set of signals. When the first control signal and a first function signal are asserted, the corresponding second signals of are asserted in response and a function is performed on the boards. But, if any of the second signals are asserted, none of the first signals is asserted in response. Test signals on boards are thereby isolated from test signals coupled to all the boards on the system, so a fault on any signal in any second set of signals will not propagate to the first set of signals.
    Type: Grant
    Filed: March 30, 2005
    Date of Patent: January 22, 2008
    Assignee: EMC Corporation
    Inventors: Douglas Sullivan, Brandon Barney
  • Patent number: 6909052
    Abstract: A circuit board has a first signal layer having a set of conductors, a second signal layer having a conductive plane and a non-conductive region, and a third signal layer having a conductive region that mirrors the non-conductive region of the second signal layer. The circuit board further includes a first separating layer having non-conductive material which is disposed between the first signal layer and the second signal layer, and a second separating layer having non-conductive material which is disposed between the second signal layer and the third signal layer. Accordingly, traces within the first signal layer and overlying the conductive plane of the second signal layer will have a first impedance, while traces within the first signal layer and overlying the non-conductive region of the second signal layer and the conductive region of the third signal layer will have a second impedance that is different than the first impedance.
    Type: Grant
    Filed: August 23, 2002
    Date of Patent: June 21, 2005
    Assignee: EMC Corporation
    Inventors: Darrin J. Haug, Brandon Barney