Patents by Inventor Brandon Day
Brandon Day has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10627842Abstract: The subject disclosure includes paralleling of monolithic embedded low drop-out (LDO) linear regulator power rails to provide additional load current, while maintaining accurate current sharing and balancing between the paralleled LDOs without additional power consumption for different load current requirements. Lossless current sensing is used to sense the current for each channel. An offset generator compares the voltages for a master channel and one or more slave channels, and generates an offset voltage according to the sensed error. The offset voltage is added between an input reference voltage and an output regulated voltage to cancel the offset of each channel, so the current of each channel is substantially the same. The lossless current sensing can be realized with equivalent series resistance compensation or current limit sensing. The offset generator can be realized with a resistor and current mirror topology or an input pair added to an error amplifier input.Type: GrantFiled: June 18, 2018Date of Patent: April 21, 2020Assignee: Analog Devices Global Unlimited CompanyInventors: Danzhu Lu, Brandon Day, Yihui Chen, Jie He
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Publication number: 20190384337Abstract: The subject disclosure includes paralleling of monolithic embedded low drop-out (LDO) linear regulator power rails to provide additional load current, while maintaining accurate current sharing and balancing between the paralleled LDOs without additional power consumption for different load current requirements. Lossless current sensing is used to sense the current for each channel. An offset generator compares the voltages for a master channel and one or more slave channels, and generates an offset voltage according to the sensed error. The offset voltage is added between an input reference voltage and an output regulated voltage to cancel the offset of each channel, so the current of each channel is substantially the same. The lossless current sensing can be realized with equivalent series resistance compensation or current limit sensing. The offset generator can be realized with a resistor and current mirror topology or an input pair added to an error amplifier input.Type: ApplicationFiled: June 18, 2018Publication date: December 19, 2019Inventors: Danzhu LU, Brandon Day, Yihui Chen, Jie He
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Patent number: 10338614Abstract: A voltage regulator circuit having an internally compensated effective series resistance includes a control circuit to generate an out current at a regulated output voltage based on a reference voltage. The control circuit includes an amplifier, a resistive element to feedback output voltage to an input of the amplifier, and a compensation circuit to couple the internally compensated effective series resistance into the control circuit. The compensation circuit includes a first current sense device to generate a first sensed current proportional to a current through an N-type pass device, a second current sense device arranged to generate a second sensed current proportional to the current through the N-type pass device, and a bias circuit coupled to sink the first sensed current and the second sensed current to reduce a bias voltage across the resistive element below a threshold voltage.Type: GrantFiled: April 24, 2018Date of Patent: July 2, 2019Assignee: Analog Devices, Inc.Inventors: Brandon Day, Mukesh Kumar, James R. Dean
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Patent number: 10243443Abstract: Apparatus and methods for a bias supply circuit to support power supply including a switched-mode voltage converter cascaded with an n-channel-based linear regulator are provided. In an example, a cascaded power supply system can include a switched-mode DC-to-DC power converter, including an input voltage node, a first stage output voltage node, and a bootstrapped floating bias voltage node, and a linear regulator circuit. The linear regulator circuit can include an n-channel field-effect transistor (NFET) pass transistor, including a drain terminal coupled to the first stage output voltage node, a gate terminal, and a source terminal configured to provide a second-stage output voltage, and a gate driver circuit, including a driver output coupled to the gate terminal of the NFET pass transistor, and a high side supply node configured to receive a bias voltage generated from the bootstrapped floating bias voltage node.Type: GrantFiled: March 16, 2016Date of Patent: March 26, 2019Assignee: Analog Devices, Inc.Inventors: Jun Zhao, Brandon Day
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Publication number: 20170271972Abstract: Apparatus and methods for a bias supply circuit to support power supply including a switched-mode voltage converter cascaded with an n-channel-based linear regulator are provided. In an example, a cascaded power supply system can include a switched-mode DC-to-DC power converter, including an input voltage node, a first stage output voltage node, and a bootstrapped floating bias voltage node, and a linear regulator circuit. The linear regulator circuit can include an n-channel field-effect transistor (NFET) pass transistor, including a drain terminal coupled to the first stage output voltage node, a gate terminal, and a source terminal configured to provide a second-stage output voltage, and a gate driver circuit, including a driver output coupled to the gate terminal of the NFET pass transistor, and a high side supply node configured to receive a bias voltage generated from the bootstrapped floating bias voltage node.Type: ApplicationFiled: March 16, 2016Publication date: September 21, 2017Inventors: Jun Zhao, Brandon Day
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Patent number: 9703306Abstract: In one example, a method for compensating for a temperature effect during operation of a voltage regulator circuit includes applying a load current at an output of the voltage regulator circuit, measuring a first output voltage at the output, measuring a reference current or voltage, increasing the load current, measuring a change in the reference current or voltage corresponding to the increased load current, measuring a second output voltage when the measured change in the reference current exceeds a threshold, and determining a temperature coefficient (TC) value based on the measured second output voltage.Type: GrantFiled: September 10, 2014Date of Patent: July 11, 2017Assignee: Analog Devices, Inc.Inventors: Brandon Day, Mark Szostkiewicz
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Publication number: 20160070280Abstract: In one example, a method for compensating for a temperature effect during operation of a voltage regulator circuit includes applying a load current at an output of the voltage regulator circuit, measuring a first output voltage at the output, measuring a reference current or voltage, increasing the load current, measuring a change in the reference current or voltage corresponding to the increased load current, measuring a second output voltage when the measured change in the reference current exceeds a threshold, and determining a temperature coefficient (TC) value based on the measured second output voltage.Type: ApplicationFiled: September 10, 2014Publication date: March 10, 2016Inventors: Brandon Day, Mark Szostkiewicz
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Publication number: 20050207080Abstract: Apparatus for providing over-current protection in a power converter device includes a first circuit for providing high-side sinking over-current protection for the power converter device responsive to a phase signal and a high-side over-current signal of the power converter device. A second circuit provides low-side sinking over-current protection for the power converter device responsive to the phase signal and the low-side over-current signal of the power converter device. Finally, a third circuit provides low-side sourcing over-current protection responsive to the phase signal, the low-side over-current protection signal and a power ground signal of the power converter device.Type: ApplicationFiled: June 24, 2004Publication date: September 22, 2005Inventors: James Leith, Gustavo Mehas, Brandon Day
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Publication number: 20050206360Abstract: An apparatus for reducing surge currents during startup of a voltage regulator is disclosed that includes circuitry for maintaining a voltage at an FB pin of the voltage regulator substantially equivalent to an output voltage of the voltage regulator.Type: ApplicationFiled: August 11, 2004Publication date: September 22, 2005Inventors: Gustavo Mehas, James Leith, Brandon Day
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Publication number: 20050206422Abstract: An apparatus for providing programmable hysteresis control using an enable pin of a device is disclosed. An enable pin is configured to receive an input signal to enable and disable an associated device responsive to the input signal. A current sink is attached to the enable pin and is responsive to circuitry that disables the current sink responsive to application of the input signal at a first voltage level and enables the current sink responsive to application of the input signal at a second voltage level.Type: ApplicationFiled: August 13, 2004Publication date: September 22, 2005Inventors: Gustavo Mehas, Chun Cheung, Brandon Day
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Publication number: 20050200389Abstract: A frequency programmable feed forward oscillator and triangular wave generator is disclosed having a first input for receiving an input voltage and a second input for receiving an input current. Circuitry within the device responsive to the input voltage scales the amplitude of a triangle wave form according to the provided input voltage and provides the scaled output voltage at a first output. In conjunction, the circuitry also generates a scaled PWM frequency responsive to the provided input current and provides this at a second output.Type: ApplicationFiled: August 25, 2004Publication date: September 15, 2005Inventors: Brandon Day, James Leith, Gustavo Mehas
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Publication number: 20050194951Abstract: A method of starting a DC-DC converter into a precharged output voltage including generating a reference voltage having a linear relationship with the output voltage such that the reference voltage ranges between a minimum and maximum voltage level of a PWM triangular waveform as the output voltage ranges between zero and an input voltage level, and enabling output switching of the DC-DC converter when the reference voltage is approximately equal to a compensation signal generated by an error amplifier comparing the reference voltage with a feedback signal representative of the output voltage. Generating a reference voltage may include applying a first current based on the input voltage through two resistors to develop the minimum and maximum voltage levels, applying the first current in one direction through a third resistor, and applying a second current based on the output voltage through the third resistor in the opposite direction.Type: ApplicationFiled: June 10, 2004Publication date: September 8, 2005Applicant: Intersil Americas Inc.Inventors: Gustavo Mehas, James Leith, Brandon Day
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Publication number: 20050110472Abstract: A PWM system that minimizes output ripple of a multiphase DC-DC converter which converts N input voltages including at least one dissimilar input voltage. The PWM system includes PWM waveform logic that generates N PWM signals including a PWM signal for each of the N input voltages, and PWM control logic that optimizes relative phases of the N PWM signals based on voltage levels of the N input voltages. Various circuits and/or methods are contemplated for optimizing phase, including, for example, centering pulses for each PWM cycle, distributing pulses based on predetermined optimal phase angles, determining input voltage levels and selecting predetermined optimal phase angles, generating phase signals employing predetermined phase angles, measuring input voltages and calculating optimal phase angles, and using PLL logic or the like to measure and equalize off-times between PWM pulses.Type: ApplicationFiled: February 26, 2004Publication date: May 26, 2005Applicant: Intersil Americas Inc.Inventors: Matthew Harris, James Leith, Brandon Day
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Publication number: 20050110561Abstract: An IC including a margining control amplifier circuit, first and second offset pins, a margining control pin, select logic, and a mirror amplifier circuit. The margining control amplifier circuit drives current at an output to control voltage at an input based on a reference voltage. The first and second offset pins are provided to couple an external margining voltage divider. The margining control pin has at least two states including an up state and a down state. The select logic selectively switches the output of the margining control amplifier circuit between the first and second offset pins and selectively switches the input of the margining control amplifier circuit between the second and first offset pins based on a state of the margining control pin. The mirror amplifier circuit mirrors voltage across the first and second offset pins across a first margining resistor.Type: ApplicationFiled: March 30, 2004Publication date: May 26, 2005Applicant: Intersil Americas Inc.Inventors: Gustavo Mehas, James Leith, Brandon Day
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Patent number: D448690Type: GrantFiled: December 12, 2000Date of Patent: October 2, 2001Assignee: United Supply, Inc.Inventor: Brandon Day
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Patent number: D462628Type: GrantFiled: December 12, 2000Date of Patent: September 10, 2002Assignee: United Supply, Inc.Inventor: Brandon Day