Patents by Inventor Brazel G. Preece

Brazel G. Preece has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6825487
    Abstract: A method of measurement of wafers to isolate wafer support-related defects involves Scanning Infrared Depolarization (SIRD) measurement of multiple processed wafers, each oriented differently on the wafer support, to obtain and characterize depolarization stress defects. The method mounts first and second wafers in first and second orientations and performs a SIRD scan of each. The results are correlated to isolate orientation dependent defects from non-orientation dependent defects. Orientation dependent defects are characterized as wafer support-related defects. Analysis of such wafer support-related defects may then be used to identify and correct the corresponding wafer support defect.
    Type: Grant
    Filed: July 30, 2002
    Date of Patent: November 30, 2004
    Assignee: Seh America, Inc.
    Inventor: Brazel G. Preece
  • Publication number: 20040157461
    Abstract: A method for fabricating a wafer including an improved method for processing the edge of a wafer that utilizes dry etching techniques is provided. In this regard, the profile of the edge of the wafer may initially be defined, such as by rounding or chamfering the edge of the wafer. The wafer edge may then be dry etched, such as by atmospheric downstream plasma (ADP) etching, chemical downstream etching (CDE) or the like, in order to smooth the edge of the wafer while eliminating, or reducing, the use of wet chemical etchants. In addition, one or both major surfaces of the wafer may be dry etched, also with ADP etching or CDE, to further reduce the use of wet chemical etchants. Wafers fabricated according to this method are also provided.
    Type: Application
    Filed: February 10, 2003
    Publication date: August 12, 2004
    Applicant: SEH America, Inc.
    Inventors: Oleg V. Kononchuk, Yi Pan, Brazel G. Preece
  • Patent number: 6733368
    Abstract: An improved method for lapping the opposed major surfaces of a wafer is provided. In this regard, a multi-step lapping process is provided in which lapping continues while transitioning from a first slurry having larger abrasive particles to a second slurry having smaller abrasive particles so as to reduce the overall length of the lapping process. In addition, the multi-step lapping process is optimized so as to remove no more than about 90 microns in total thickness from the opposed major surfaces of the wafer. By completing the lapping with slurry having smaller abrasive particles, subsequent etching of the wafers produces shallower surface pitting. As such, the wafers generally require less polishing than required by conventional processes.
    Type: Grant
    Filed: February 10, 2003
    Date of Patent: May 11, 2004
    Assignee: SEH America, Inc.
    Inventors: Yi Pan, Brazel G. Preece
  • Publication number: 20040021097
    Abstract: A method of measurement of wafers to isolate wafer support-related defects involves Scanning Infrared Depolarization (SIRD) measurement of multiple processed wafers, each oriented differently on the wafer support, to obtain and characterize depolarization stress defects.
    Type: Application
    Filed: July 30, 2002
    Publication date: February 5, 2004
    Applicant: SEH AMERICA, INC.
    Inventor: Brazel G. Preece