Abstract: Systems and methods for recording and transcribing conversations in real-time. Sentiment analysis is performed on each utterance to determine both an intent of the conversation along with sentiment. Annotated transcripts are provided. A machine learning model may be used to augment sentiment analysis.

Abstract: According to a first aspect of the present invention, there is provided a cookware comprising a double wall cooking apparatus having a mounted electronic device, the mounted electronic device comprising a processor and an electronic display, wherein the processor is programmed with instructions that, when executed, cause the processor at least to configure the electronic display to indicate a status of the double wall cooking apparatus. The cookware may further comprise a temperature sensor and/or a wireless transceiver, wherein the temperature sensor is calibrated to read an internal temperature of the double wall cooking apparatus; and wherein the wireless transceiver detects commands from the processor to provide content for display on the electronic display.

Abstract: A method for producing a thin-film solar cell on an initial substrate, the thin-film solar cell being removable from the initial substrate, the thin-film solar cell including a rear metal layer and a thin-film stack including a p-n junction, the method including depositing the rear metal layer on the initial substrate by sputtering; forming the thin-film stack on the rear metal layer, wherein the power, temperature and pressure used to deposit the rear metal layer are chosen so as to introduce shear stress into the rear metal layer in a controlled manner.

Abstract: A treatment of thin layers for forming a connection of a photovoltaic cell including the thin layers, which includes a first layer, having photovoltaic properties, deposited on a second layer, and the second layer, which is a metal contact layer, deposited on a substrate, the treatment including etching, in the first layer, at least one first trench having a first width so as to expose the second layer; and etching, in the first trench, a second trench so as to expose the substrate, the second trench having a second width less than the first width.

Abstract: A treatment of thin layers for forming a connection of a photovoltaic cell including the thin layers, which includes a first layer, having photovoltaic properties, deposited on a second layer, and the second layer, which is a metal contact layer, deposited on a substrate, the treatment including etching, in the first layer, at least one first trench having a first width so as to expose the second layer; and etching, in the first trench, a second trench so as to expose the substrate, the second trench having a second width less than the first width.

Abstract: A method for stacking and interconnecting integrated circuits includes providing at least two substrates; forming a trench in each substrate; filling the trench with an insulating material; forming, in each substrate, at least one conductive area; thinning each substrate until reaching at least the bottom of the trench, to obtain in each substrate at least one electrically insulated region within the closed perimeter delineated by the trench; bonding the substrates together; making at least one hole through the bonded substrates so that the hole passes at least partially through the conductive areas and passes through the insulated region of each substrate; and filling the hole with an electrically conductive material so as to obtain a conductive column that traverses the isolated region of each substrate and is in lateral electrical contact with the conductive areas.

Abstract: The present invention relates to the manufacture of a photovoltaic cell panel, said manufacture comprising the steps of: a) obtaining photovoltaic (PV) films that are each intended for a cell and are placed onto a front surface of a metal substrate; b) applying at least one conductive film (CG, CND) onto each front surface of a photovoltaic film; c) cutting up the substrate (SUB) so as to isolate the cells from each other; and d) encapsulating (ENC) the cells on a common mounting. According to the invention, steps d) and c) are reversed, so step d) relates to encapsulating the front surface of the substrate before step c), cutting the substrate up by the rear surface thereof.

Abstract: A method for stacking and interconnecting integrated circuits includes providing at least two substrates; forming a trench in each substrate; filling the trench with an insulating material; forming, in each substrate, at least one conductive area; thinning each substrate until reaching at least the bottom of the trench, to obtain in each substrate at least one electrically insulated region within the closed perimeter delineated by the trench; bonding the substrates together; making at least one hole through the bonded substrates so that the hole passes at least partially through the conductive areas and passes through the insulated region of each substrate; and filling the hole with an electrically conductive material so as to obtain a conductive column that traverses the isolated region of each substrate and is in lateral electrical contact with the conductive areas.

Abstract: A method for stacking and interconnecting integrated circuits includes providing at least two substrates; forming a trench in each substrate; filling the trench with an insulating material; forming, in each substrate, at least one conductive area; thinning each substrate until reaching at least the bottom of the trench, to obtain in each substrate at least one electrically insulated region within the closed perimeter delineated by the trench; bonding the substrates together; making at least one hole through the bonded substrates so that the hole passes at least partially through the conductive areas and passes through the insulated region of each substrate; and filling the hole with an electrically conductive material so as to obtain a conductive column that traverses the isolated region of each substrate and is in lateral electrical contact with the conductive areas.

Abstract: A method for manufacturing a micro-module for capturing images having an imager and at least one lens, includes manufacturing at least one imager on a first plate of a semiconductor material, producing at least one optical zone to form a lens in at least one second plate of a transparent material, and of assembling the first and second plates so that the imager can receive light through the optical zone.

Abstract: A method of manufacturing a micromodule including the steps of: producing an integrated circuit on an active face of a chip made of a semi-conductive material, making a via passing through the chip, electrically linked to the integrated circuit, and inserting the chip into a box comprising a cavity and an electrically conductive element, the active face of the chip being disposed towards the bottom of the cavity, forming on at least one part of a lateral face of the chip a conductive lateral layer made of an electrically conductive material, electrically linked to a conductive element of the rear face of the chip, and producing a connection between the conductive lateral layer and the conductive element by depositing an electrically conductive material in the cavity.

Abstract: A CMOS imager includes a photosite array and a microlens array. The microlens array comprises microlenses of a first type and microlenses of a second type, the microlenses of first type being manufactured according to a first circular template having a first radius, the microlenses of second type being manufactured according to a second circular template having a second radius inferior to the first radius, and the first and second templates having overlap areas. One advantage is that the CMOS imager has a high fill rate.

Abstract: A method for stacking and interconnecting integrated circuits includes providing at least two substrates; forming a trench in each substrate; filling the trench with an insulating material; forming, in each substrate, at least one conductive area; thinning each substrate until reaching at least the bottom of the trench, to obtain in each substrate at least one electrically insulated region within the closed perimeter delineated by the trench; bonding the substrates together; making at least one hole through the bonded substrates so that the hole passes at least partially through the conductive areas and passes through the insulated region of each substrate; and filling the hole with an electrically conductive material so as to obtain a conductive column that traverses the isolated region of each substrate and is in lateral electrical contact with the conductive areas.

Abstract: A method of manufacturing a micromodule including the steps of: producing an integrated circuit on an active face of a chip made of a semi-conductive material, making a via passing through the chip, electrically linked to the integrated circuit, and inserting the chip into a box comprising a cavity and an electrically conductive element, the active face of the chip being disposed towards the bottom of the cavity, forming on at least one part of a lateral face of the chip a conductive lateral layer made of an electrically conductive material, electrically linked to a conductive element of the rear face of the chip, and producing a connection between the conductive lateral layer and the conductive element by depositing an electrically conductive material in the cavity.

Abstract: A CMOS imager includes a photosite array and a microlens array. The microlens array comprises microlenses of a first type and microlenses of a second type, the microlenses of first type being manufactured according to a first circular template having a first radius, the microlenses of second type being manufactured according to a second circular template having a second radius inferior to the first radius, and the first and second templates having overlap areas. One advantage is that the CMOS imager has a high fill rate.