Abstract: In an example, a method includes forming a first self-checking pair including a self-checking node and a first node adjacent to the self-checking node in a network. The method further includes forming a second self-checking pair including the self-checking node and a second node adjacent to the self-checking node in the network, wherein the self-checking node is between the first node and the second node. The method further includes transmitting a first paired broadcast with the first self-checking pair and transmitting a second paired broadcast with the second self-checking pair.

Abstract: Systems and methods for a controller area network braided ring are provided. In certain embodiments, a node within a controller area network braided ring includes a controller area network (CAN) controller that transmits and receives CAN messages according to CAN protocol. The node also includes braided ring availability integrity network (BRAIN) circuitry coupled to the CAN controller, wherein the BRAIN circuitry alters the received CAN messages from the CAN controller for transmission to other nodes within a BRAIN network and alters BRAIN messages received from the other nodes into CAN messages for processing by the CAN controller.

Abstract: In some examples, a circuit includes a data line, an input line, a first memory element, and a decoder to receive an address and to enable the first memory element for access in response to the address. The selector is responsive to the data line to select the first memory element, where the selector is to select the first memory element responsive to the data line having a first value, and where the data line is to communicate data of a second memory element in response to the second memory element being enabled for access. The input line is to communicate data of the first memory element in response to the first memory element being selected by the selector.

Abstract: In some examples, a circuit includes a data line, an input line, a first memory element, and a decoder to receive an address and to enable the first memory element for access in response to the address. The selector is responsive to the data line to select the first memory element, where the selector is to select the first memory element responsive to the data line having a first value, and where the data line is to communicate data of a second memory element in response to the second memory element being enabled for access. The input line is to communicate data of the first memory element in response to the first memory element being selected by the selector.

Abstract: In an example, a node in a network includes four ports coupled to respective nodes via respective links. Two of the ports are coupled to respective nodes via respective near links and two of the port are coupled to respective nodes via respective skip links. The node further includes a processor configured to compare first and second data streams, sourced from a self-checking pair of nodes, received in a first direction and to compare third and fourth data streams, sourced from the self-checking pair of nodes, received in a second direction. The processor is configured to relay the second data stream in the first direction and fourth data stream in the second direction and a hop count at the end of the respective data stream that is indicative of integrity of the respective data stream.

Abstract: In some examples, a circuit includes a data line, an input line, a first memory element, and a decoder to receive an address and to enable the first memory element for access in response to the address. The selector is responsive to the data line to select the first memory element, where the selector is to select the first memory element responsive to the data line having a first value, and where the data line is to communicate data of a second memory element in response to the second memory element being enabled for access. The input line is to communicate data of the first memory element in response to the first memory element being selected by the selector.

Abstract: In some examples, a circuit for use with a memory element and a nozzle for outputting fluid, includes a data line, a fire line, and a selector responsive to the data line to select the memory element or the nozzle. The selector is to select the memory element responsive to the data line having a first value, and to select the nozzle responsive to the data line having a second value different from the first value. The fire line is to control activation of the nozzle in response to the nozzle being selected by the selector, and to communicate data of the memory element in response to the memory element being selected by the selector.

Abstract: A network includes a plurality of nodes and a plurality of links communicatively coupling each of the nodes to at least one respective adjacent node via a first communication channel and to another respective adjacent node via a second communication channel. The nodes and links have a braided ring topology. First and second nodes of the plurality of nodes source data, are adjacent nodes, and at least one is a source node. The first node sends a first communication to the second node via a third node that is adjacent the first node and via a fourth node that is adjacent the second node. The second node sends a second communication to the first node via the third node and via the fourth node. At least one of the first and second nodes terminates transmission of the first and second communications when the first and second communications do not match.

Abstract: In an example, a node in a network includes four ports coupled to respective nodes via respective links. A first port and a third port are coupled to respective nodes via respective near links and a second port and a fourth port are coupled to respective nodes via respective skip links. The node further includes at least one processor configured to send a first message in a first direction via the second port, and the first message includes a first destination address that corresponds to the second side of the node. The at least one processor is further configured to send a second message in a second direction via the fourth port, and the second message includes a second destination address that corresponds to the first side of the node.

Abstract: In some examples, a circuit includes a data line, an input line, a first memory element, and a decoder to receive an address and to enable the first memory element for access in response to the address. The selector is responsive to the data line to select the first memory element, where the selector is to select the first memory element responsive to the data line having a first value, and where the data line is to communicate data of a second memory element in response to the second memory element being enabled for access. The input line is to communicate data of the first memory element in response to the first memory element being selected by the selector.

Abstract: In an example, a node in a network includes four ports coupled to respective nodes via respective links. Two of the ports are coupled to respective nodes via respective near links and two of the port are coupled to respective nodes via respective skip links. The node further includes a processor configured to compare first and second data streams, sourced from a self-checking pair of nodes, received in a first direction and to compare third and fourth data streams, sourced from the self-checking pair of nodes, received in a second direction. The processor is configured to relay the second data stream in the first direction and fourth data stream in the second direction and a hop count at the end of the respective data stream that is indicative of integrity of the respective data stream.

Abstract: In an example, a method includes forming a first self-checking pair including a self-checking node and a first node adjacent to the self-checking node in a network. The method further includes forming a second self-checking pair including the self-checking node and a second node adjacent to the self-checking node in the network, wherein the self-checking node is between the first node and the second node. The method further includes transmitting a first paired broadcast with the first self-checking pair and transmitting a second paired broadcast with the second self-checking pair.

Abstract: In some examples, a circuit for use with a memory element and a nozzle for outputting fluid, includes a data line, a fire line, and a selector responsive to the data line to select the memory element or the nozzle. The selector is to select the memory element responsive to the data line having a first value, and to select the nozzle responsive to the data line having a second value different from the first value. The fire line is to control activation of the nozzle in response to the nozzle being selected by the selector, and to communicate data of the memory element in response to the memory element being selected by the selector.

Abstract: In an embodiment, a computing node includes a computing circuit, a comparing circuit, and an indicator circuit. The computing circuit is configured to receive each of at least one input-data message. The comparing circuit is configured to compare each of the at least one received input-data message to a list of input-data-message identifiers. And the indicator circuit is configured, for each of the at least one input-data message that corresponds to a respective input-data-message identifier, to generate a respective portion of a first status message, the respective portion indicating that the input-data message was received. For example, such computing node can determine the congruency of a received input-data message between coupled redundancy circuits with reduced processing overhead, reduced message delay, and reduced message latency as compared to existing computer nodes.

Abstract: In an embodiment, a computing node includes a computing circuit, a comparing circuit, and an indicator circuit. The computing circuit is configured to generate a first redundant message that corresponds to, and that is independent of, a source message propagating over a network during at least one time period. The comparing circuit is configured to compare information content of one or more corresponding portions of the source message and the first redundant message during each of the at least one time period to generate a comparison result. And the indicator circuit is configured to indicate whether the source message is valid or invalid in response to the comparison result. For example, such computing node can determine the validity of a redundant result with reduced processing overhead, reduced message delay, and reduced message latency as compared to existing computer nodes.

Abstract: In an example, a recovery system is shown, the recovery system comprising: a housing; a parasail comprising a canopy coupled within the housing fastened by a releasable fastener, wherein the parasail is compressed into a compact mass and is configured to rapidly expand; primary ballistics attached to the parasail, wherein the primary ballistics are configured to launch the parachute from the housing; and a guidance system within the housing wherein the guidance system is configured to steer the parasail and guide the recovery system to a landing site.

Abstract: In some examples, a system includes a plurality of fluid ejection devices, a fluid ejection controller, and a plurality of data lines shared by the plurality of fluid ejection devices and connected between the fluid ejection controller and the plurality of fluid ejection devices. A first data line of the plurality of data lines communicates data of a first memory of a first fluid ejection device of the plurality of fluid ejection devices, and a second data line of the plurality of data lines communicates data of a second memory of the first fluid ejection device.

Abstract: In an embodiment, a computing node includes a computing circuit, a comparing circuit, and an indicator circuit. The computing circuit is configured to receive each of at least one input-data message. The comparing circuit is configured to compare each of the at least one received input-data message to a list of input-data-message identifiers. And the indicator circuit is configured, for each of the at least one input-data message that corresponds to a respective input-data-message identifier, to generate a respective portion of a first status message, the respective portion indicating that the input-data message was received. For example, such computing node can determine the congruency of a received input-data message between coupled redundancy circuits with reduced processing overhead, reduced message delay, and reduced message latency as compared to existing computer nodes.

Abstract: A network includes a plurality of nodes and a plurality of links communicatively coupling each of the nodes to at least one respective adjacent node via a first communication channel and to another respective adjacent node via a second communication channel. The nodes and links have a braided ring topology. First and second nodes of the plurality of nodes source data, are adjacent nodes, and at least one is a source node. The first node sends a first communication to the second node via a third node that is adjacent the first node and via a fourth node that is adjacent the second node. The second node sends a second communication to the first node via the third node and via the fourth node. At least one of the first and second nodes terminates transmission of the first and second communications when the first and second communications do not match.

Abstract: In an embodiment, a computing node includes a computing circuit, a comparing circuit, and an indicator circuit. The computing circuit is configured to generate a first redundant message that corresponds to, and that is independent of, a source message propagating over a network during at least one time period. The comparing circuit is configured to compare information content of one or more corresponding portions of the source message and the first redundant message during each of the at least one time period to generate a comparison result. And the indicator circuit is configured to indicate whether the source message is valid or invalid in response to the comparison result. For example, such computing node can determine the validity of a redundant result with reduced processing overhead, reduced message delay, and reduced message latency as compared to existing computer nodes.