Patents by Inventor Brendan M. KAYES

Brendan M. KAYES has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220077333
    Abstract: Embodiments of the invention generally relate to photovoltaic devices. In one embodiment, a method for forming a gallium arsenide based photovoltaic device includes providing a semiconductor structure, the structure including an absorber layer comprising gallium arsenide. A bypass function is provided in a p-n junction of the semiconductor structure, where under reverse-bias conditions the p-n junction breaks down in a controlled manner by a Zener breakdown effect.
    Type: Application
    Filed: November 17, 2021
    Publication date: March 10, 2022
    Inventors: Hui NIE, Brendan M. KAYES, Isik C. KIZILYALLI
  • Publication number: 20210305452
    Abstract: A method is provided for preparing at least one textured layer in an optoelectronic device. The method includes epitaxially growing a semiconductor layer of the optoelectronic device over a growth substrate; exposing the semiconductor layer to an etching process to create the at least one textured surface on the semiconductor layer; and lifting the optoelectronic device from the growth substrate.
    Type: Application
    Filed: June 14, 2021
    Publication date: September 30, 2021
    Inventors: Yan ZHU, Sean SWEETNAM, Brendan M. KAYES, Melissa J. ARCHER, Gang HE
  • Publication number: 20210116654
    Abstract: Aspects of the present disclosure include methods, apparatuses, and computer readable media for transmitting a light such that it is incident on a multi-layer stack, wherein the multi-layer stack includes the feature and a region without the feature, detecting a narrow-band light from the feature and the region without the feature, wherein the feature has a first optical response in response to a wavelength of the narrow-band light and the region without the feature has a second optical response in response to the wavelength of the narrow-band light, and generating, based on the narrow-band light, an image indicative of where the first optical response and the second optical response occur on the multi-layer stack.
    Type: Application
    Filed: October 18, 2019
    Publication date: April 22, 2021
    Inventors: Vineet KUMAR, Katayoun ZAND, Howard WOO, Markelle L. GIBBS, Enrique BRAVO MORA, Christopher E. FRANCE, Brendan M. KAYES
  • Publication number: 20200365755
    Abstract: Aspects of the disclosure relate to surface passivation, and more particularly, surface passivation of optoelectronic devices made of Group III-V semiconductors. In one implementation, a method for passivating an optoelectronic device is described that includes providing a window layer of the optoelectronic device; and depositing a window passivation layer over a surface of the window layer. In another implementation, an optoelectronic device is described that includes a window layer disposed over an absorber layer; and a window passivation layer disposed over a surface of the window layer. In other implementations, a method and an optoelectronic device are based on providing a window layer of the optoelectronic device; and providing a window passivation layer of the optoelectronic device, wherein the window passivation layer is adjacent to the window layer.
    Type: Application
    Filed: May 13, 2020
    Publication date: November 19, 2020
    Inventors: Andrew J. RITENOUR, Brendan M. KAYES
  • Publication number: 20200119216
    Abstract: A growth structure having a lattice transition (or graded buffer) or an engineered growth structure with a desired lattice constant, different from a lattice constant of conventional substrates like GaAs, Si, Ge, InP, under a release layer or an etch stop layer is used as a seed crystal for growing optoelectronic devices. The optoelectronic device can be a photovoltaic device having one or more subcells (e.g., lattice-matched or lattice-mismatched subcells). The release layer can be removed using different processes to separate the optoelectronic device from the growth structure, which may be reused, or from the engineered growth structure. When using the etch stop layer, the growth structure or the engineered growth structure may be grinded or etched away. The engineered growth structure may be made from a layer transfer process between two wafers or from a ternary and/or a quaternary material. Methods for making the optoelectronic device are also described.
    Type: Application
    Filed: October 18, 2019
    Publication date: April 16, 2020
    Inventors: Nikhil JAIN, Andrew J. RITENOUR, Ileana RAU, Claudio CANIZARES, Lori D. WASHINGTON, Gang HE, Brendan M. KAYES
  • Publication number: 20200119222
    Abstract: A growth structure having a lattice transition (or graded buffer) or an engineered growth structure with a desired lattice constant, different from a lattice constant of conventional substrates like GaAs, Si, Ge, InP, under a release layer or an etch stop layer is used as a seed crystal for growing optoelectronic devices. The optoelectronic device can be a photovoltaic device having one or more subcells (e.g., lattice-matched or lattice-mismatched subcells). The release layer can be removed using different processes to separate the optoelectronic device from the growth structure, which may be reused, or from the engineered growth structure. When using the etch stop layer, the growth structure or the engineered growth structure may be grinded or etched away. The engineered growth structure may be made from a layer transfer process between two wafers or from a ternary and/or a quaternary material. Methods for making the optoelectronic device are also described.
    Type: Application
    Filed: October 18, 2019
    Publication date: April 16, 2020
    Inventors: Nikhil JAIN, Andrew J. RITENOUR, Ileana RAU, Claudio CANIZARES, Lori D. WASHINGTON, Gang HE, Brendan M. KAYES
  • Publication number: 20190386170
    Abstract: A multi junction optoelectronic device and method of fabrication are disclosed. In an aspect, the method includes forming a first p-n structure on a substrate, the first p-n structure including a semiconductor having a lattice constant that matches a lattice constant of the substrate; forming one or more additional p-n structures on the first p-n structure, each of the one or more additional p-n structures including a semiconductor having a lattice constant that matches the lattice constant of the substrate, the semiconductor of a last of the one or more additional p-n structures that is formed including a dilute nitride, and the multi junction optoelectronic device including the first p-n structure and the one or more additional p-n structures; and separating the multi junction optoelectronic device from the substrate. In some implementations, it is possible to have the dilute nitride followed by a group IV p-n structure.
    Type: Application
    Filed: June 18, 2018
    Publication date: December 19, 2019
    Inventors: Nikhil JAIN, Brendan M. KAYES, Gang HE
  • Publication number: 20190272994
    Abstract: Aspects of the disclosure relate to processes for epitaxial growth of III-V compound of (Al)GaInP material at high rates, such as about 8 ?m/hr, 10 ?m/hr, 20 ?m/hr, 30 ?m/hr, 40 ?m/hr, and 8-120 ?m/hr deposition rates. The high growth-rate deposited (Al)InGaP materials or films may be utilized in solar, semiconductor, or other electronic device applications. The Group III/V materials may be formed or grown on a sacrificial layer disposed on or over the support substrate during a chemical vapor deposition process. Subsequently, the Group III/V materials may be removed from the support substrate during an epitaxial lift off (ELO) process. The Group III/V materials are thin films of epitaxially grown layers containing gallium aluminum indium phosphide, gallium indium phosphide, derivatives thereof, alloys thereof, or combinations thereof.
    Type: Application
    Filed: May 14, 2019
    Publication date: September 5, 2019
    Inventors: Nikhil JAIN, Jason M. JEWELL, Chaowei WANG, Ji WU, Emmett Edward PERL, Claudio Andrés CAÑIZARES, Ling ZHANG, Brendan M. KAYES
  • Publication number: 20190221698
    Abstract: An optoelectronic device is disclosed. The optoelectronic device comprises a semiconductor structure; a plurality of contacts on the front side of the semiconductor structure; and a plurality of non-continuous metal contacts on a back side of the semiconductor structure. In an embodiment, a plurality of non-continuous back contacts on an optoelectronic device improve the reflectivity and reduce the losses associated with the back surface of the device.
    Type: Application
    Filed: November 16, 2018
    Publication date: July 18, 2019
    Inventors: Brendan M. KAYES, Sylvia SPRUYTTE, I-Kang DING, Rose TWIST, Gregg HIGASHI
  • Publication number: 20190181281
    Abstract: Embodiments of the invention generally relate to photovoltaic devices. In one embodiment, a method for forming a gallium arsenide based photovoltaic device includes providing a semiconductor structure, the structure including an absorber layer comprising gallium arsenide and an emitter layer. A bypass function is provided in a p-n junction of the semiconductor structure, where under reverse-bias conditions the p-n junction breaks down in a controlled manner by a Zener breakdown effect. The absorber or base layer has a grading in doping concentration from a first doping level closest to the emitter layer to a second doping level away from the emitter layer, the second doping level being greater than the first doping level.
    Type: Application
    Filed: February 15, 2019
    Publication date: June 13, 2019
    Inventors: Andrew J. RITENOUR, Brendan M. KAYES, Hui NIE, Isik KIZILYALLI
  • Publication number: 20180366609
    Abstract: A growth structure having a lattice transition under a release layer is used as a seed crystal for growth of optoelectronic devices. The optoelectronic device can be a single- or multi-junction photovoltaic device. The release layer can be selectively removed in an epitaxial lift-off (ELO) process to separate the optoelectronic device from the growth structure and leave the region with the lattice transition intact to reuse the growth structure to grow additional devices. A manufacturing method is described that includes providing a growth structure having a substrate and a lattice transition from a first lattice constant to a second lattice constant, depositing a release layer on the growth structure, depositing on the release layer an epitaxial layer having a lattice constant that matches the second lattice and including an optoelectronic device, and removing the release layer to separate the epitaxial layer and the optoelectronic device from the growth structure.
    Type: Application
    Filed: June 14, 2018
    Publication date: December 20, 2018
    Inventors: Andrew J. RITENOUR, Ileana RAU, Claudio CANIZARES, Lori D. WASHINGTON, Brendan M. KAYES, Gang He
  • Publication number: 20180248069
    Abstract: A multi-junction optoelectronic device and method of manufacture are disclosed. The method comprises providing a first p-n structure on a substrate, wherein the first p-n structure comprises a first base layer of a first semiconductor with a first bandgap such that a lattice constant of the first semiconductor matches a lattice constant of the substrate, and wherein the first semiconductor comprises a Group III-V semiconductor. The method includes providing a second p-n structure, wherein the second p-n structure comprises a second base layer of a second semiconductor with a second bandgap, wherein a lattice constant of the second semiconductor matches a lattice constant of the first semiconductor, and wherein the second semiconductor comprises a Group IV semiconductor. The method also includes lifting off the substrate the multi-junction optoelectronic device having the first p-n structure and the second p-n structure, wherein the multi-junction optoelectronic device is a flexible device.
    Type: Application
    Filed: April 19, 2018
    Publication date: August 30, 2018
    Inventors: Brendan M. KAYES, Gang HE
  • Publication number: 20180240928
    Abstract: Embodiments generally relate to optoelectronic semiconductor devices such as solar cells. In one aspect, a device includes an absorber layer made of gallium arsenide (GaAs) and having only one type of doping. An emitter layer is located closer than the absorber layer to a back side of the device and is made of a different material and having a higher bandgap than the absorber layer. A heterojunction is formed between the emitter layer and the absorber layer, and a p-n junction is formed between the emitter layer and the absorber layer and at least partially within the different material at a location offset from the heterojunction. An intermediate layer is located between the absorber layer and the emitter layer and provides the offset of the p-n junction from the heterojunction, and includes a graded layer and an ungraded back window layer.
    Type: Application
    Filed: April 20, 2018
    Publication date: August 23, 2018
    Inventors: Brendan M. KAYES, Hui NIE, Isik C. KIZILYALLI
  • Publication number: 20180019359
    Abstract: An optoelectronic semiconductor device is disclosed. The device comprises a plurality of stacked p-n junctions (e.g., multi junction device). The optoelectronic semiconductor device includes a n-doped layer disposed below the p-doped layer to form a p-n layer such that electric energy is created when photons are absorbed by the p-n layer. Recesses are formed on top of the p-doped layer at the top of the plurality of stacked p-n junctions. The junctions create an offset and an interface layer is formed on top of the p-doped layer at the top of the plurality stacked p-n junctions. The device also includes a window layer disposed below the plurality stacked p-n junctions. In another aspect, one or more optical filters are inserted into a device to enhance its efficiency through photon recycling. The device can be fabricated by epitaxial growth on a substrate and removed from the substrate through a lift off process.
    Type: Application
    Filed: September 15, 2017
    Publication date: January 18, 2018
    Inventors: Brendan M. KAYES, Gang HE, Sylvia SPRUYTTE, I-Kang DING, Gregg HIGASHI
  • Publication number: 20170323987
    Abstract: Embodiments of the invention generally relate to photovoltaic devices. In one embodiment, a method for forming a gallium arsenide based photovoltaic device includes providing a semiconductor structure, the structure including an absorber layer comprising gallium arsenide. A bypass function is provided in a p-n junction of the semiconductor structure, where under reverse-bias conditions the p-n junction breaks down in a controlled manner by a Zener breakdown effect.
    Type: Application
    Filed: July 21, 2017
    Publication date: November 9, 2017
    Inventors: Hui NIE, Brendan M. KAYES, Isik C. KIZILYALLI
  • Publication number: 20170148930
    Abstract: An optoelectronic device having a textured layer is described. In an aspect, a method may be used to produce the optoelectronic device, where the method includes epitaxially growing a semiconductor layer of the optoelectronic device on a growth substrate, and exposing the semiconductor layer to an etching process to create at least one textured surface in the semiconductor layer. The textured semiconductor layer can be referred to as a textured layer. The etching process is performed without the use of a template layer, or similar layer, configured as a mask to generate the texturing. The etching process can be done by one or more of a liquid or solution-based chemical etchant, gas etching, laser etching, plasma etching, or ion etching. The method can also include lifting the semiconductor layer of the optoelectronic device from the growth substrate by, for example, the use of an epitaxial lift off (ELO) process.
    Type: Application
    Filed: February 1, 2017
    Publication date: May 25, 2017
    Inventors: Yan ZHU, Sean SWEETNAM, Brendan M. KAYES, Melissa J. ARCHER, Gang HE
  • Publication number: 20170141256
    Abstract: A multi-junction optoelectronic device and method of manufacture are disclosed. The method comprises providing a first p-n structure on a substrate, wherein the first p-n structure comprises a first base layer of a first semiconductor with a first bandgap such that a lattice constant of the first semiconductor matches a lattice constant of the substrate, and wherein the first semiconductor comprises a Group III-V semiconductor. The method includes providing a second p-n structure, wherein the second p-n structure comprises a second base layer of a second semiconductor with a second bandgap, wherein a lattice constant of the second semiconductor matches a lattice constant of the first semiconductor, and wherein the second semiconductor comprises a Group IV semiconductor. The method also includes lifting off the substrate the multi-junction optoelectronic device having the first p-n structure and the second p-n structure, wherein the multi-junction optoelectronic device is a flexible device.
    Type: Application
    Filed: January 26, 2017
    Publication date: May 18, 2017
    Inventors: Brendan M. KAYES, Gang HE
  • Publication number: 20170047471
    Abstract: A method for providing a textured layer in an optoelectronic device is disclosed. The method includes depositing a template layer on a first layer. The template layer has significant inhomogeneity either in thickness or in composition, or both, including the possibility of forming one or more islands to provide at least one textured surface of the island layer. The method also includes exposing the template layer and the first layer to an etching process to create or alter at least one textured surface. The altered at least one textured surface is operative to cause scattering of light.
    Type: Application
    Filed: November 1, 2016
    Publication date: February 16, 2017
    Inventors: I-Kang DING, Brendan M. KAYES, Rose TWIST, Sylvia SPRUYTTE, Feng LIU, Gregg HIGASHI, Melissa J. ARCHER, Gang HE
  • Publication number: 20160155881
    Abstract: An optoelectronic device with high band-gap absorbers optimized for indoor use and a method of manufacturing are disclosed. The optoelectronic semiconductor device comprises a p-n structure made of one or more compound semiconductors, wherein the p-n structure comprises a base layer and an emitter layer, wherein the base and/or emitter layers comprise materials whose quantum efficiency spectrum is well-matched to a spectrum of incident light, wherein the incident light is from a light source other than the sun; and wherein the device is a flexible single-crystal device. The method for forming an optoelectronic device optimized for the conversion of light from non-solar illumination sources into electricity, comprises depositing a buffer layer on a wafer; depositing a release layer above the buffer layer; depositing a p-n structure above the release layer; and lifting off the p-n structure from the wafer.
    Type: Application
    Filed: January 25, 2016
    Publication date: June 2, 2016
    Inventors: Brendan M. KAYES, Gregg S. HIGASHI, Sam COWLEY, Christopher FRANCE, Ling ZHANG, Gang HE
  • Publication number: 20150380576
    Abstract: An optoelectronic device and a method for fabricating the optoelectronic device are disclosed. The optoelectronic device comprises a p-n structure, a patterned dielectric layer comprising a dielectric material and a metal layer disposed on the dielectric layer. The metal layer makes one or more contact to the p-n structure through the patterned dielectric layer. The dielectric material may be chemically resistant to acids and may provide adhesion to the p-n structure and the metal layer. The method for fabricating an optoelectronic device comprises providing a p-n structure, providing a dielectric layer on the p-n structure and providing a metal layer on the dielectric layer and then lifting the device off the substrate, such that after the lift off the p-n structure is closer than the patterned dielectric layer to a front side of the device; wherein the device comprises the p-n structure, the patterned dielectric layer, and the metal layer.
    Type: Application
    Filed: September 4, 2015
    Publication date: December 31, 2015
    Inventors: Brendan M. KAYES, Melissa J. ARCHER, Thomas J. GMITTER, Gang HE