Patents by Inventor Breno H. Leitao

Breno H. Leitao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200348935
    Abstract: Embodiments are disclosed for managing a non-volatile dual in-line memory module (NVDIMM) storage system. The techniques include loading an executable to a volatile random access memory. The techniques also include in response to a store operation attempted by the executable, determining that a target address of the store operation is not mapped from an address in the random access memory to an address in an NVDIMM. The techniques further include mapping the target address from the address in the volatile random access memory to the address in the NVDIMM. Additionally, the techniques include performing the store operation in the address in the NVDIMM based on the mapping.
    Type: Application
    Filed: May 2, 2019
    Publication date: November 5, 2020
    Inventors: Carlos Eduardo Seo, Juscelino Candido De Lima Junior, Breno H. Leitao
  • Publication number: 20200294525
    Abstract: Embodiments describe an approach for generating a sign language translation of an audio portion of a video. Embodiments receive a request for a sign language translation for a selected video and extract audio from the selected video. Additionally, embodiments, convert the extracted audio into text, identify contextual sounds in the audio, and convert the text and the contextual sounds into sign language content. Furthermore, embodiments, generate a sign language video based on the sign language content, and display the sign language video in a separate display window on the selected video.
    Type: Application
    Filed: March 15, 2019
    Publication date: September 17, 2020
    Inventors: REGINALDO MARCELO DOS SANTOS, Breno H. Leitao, Renata Balthazar de Lima Mussauer
  • Patent number: 10776009
    Abstract: A computer-implemented method, a computer program product, and a computer system for journaling on an appendable non-volatile memory module. A kernel receives a request for a write operation of a file on a disk. The kernel instructs a memory management unit to perform an access control list verification. The memory management unit determines whether a user associated with the write operation is permitted to write a filesystem journal onto a non-volatile dual in-line memory module, by performing the access control list verification. The memory management unit writes the filesystem journal onto the non-volatile dual in-line memory module, in response to that the user associated with the write operation is permitted to write the filesystem journal. The kernel writes the file onto the disk.
    Type: Grant
    Filed: January 3, 2019
    Date of Patent: September 15, 2020
    Assignee: International Business Machines Corporation
    Inventors: Breno H. Leitao, Juscelino Candido de Lima Junior, Carlos Eduardo Seo
  • Patent number: 10754776
    Abstract: Systems and methods for cache balance when using hardware transactional memory are disclosed. A method includes: determining, by a computing device, a hardware transactional memory (HTM) attrition rate for a workload in a distributed computing environment; determining, by the computing device, whether or not the HTM attrition rate for the workload exceeds a predetermined threshold; and in response to determining that the HTM attrition rate for the workload does not exceed the predetermined threshold, the computing device causing a requested HTM transaction to begin.
    Type: Grant
    Filed: July 30, 2018
    Date of Patent: August 25, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Daniel Battaiola Kreling, Breno H. Leitao, Mauro Sergio Martins Rodrigues, Rafael Camarda Silva Folco
  • Patent number: 10725805
    Abstract: A method, system, and computer program product are disclosed for creating an in-memory application image. Embodiments can include receiving an application from a storage. Embodiments can also include loading the received application into a memory storage pool. Embodiments can also include receiving an indication of a request to execute the in-memory application image on a first virtual machine of a plurality of virtual machines. Embodiments can also include receiving an indication to execute the in-memory application image on the first virtual machine. Embodiments can also include removing the in-memory application image from the memory storage pool, in response to the receiving the indication to execute the in-memory application. Embodiments can also include assigning the removed in-memory application image to the first virtual machine.
    Type: Grant
    Filed: November 25, 2015
    Date of Patent: July 28, 2020
    Assignee: International Business Machines Corporation
    Inventors: Rafael C. S. Folco, Breno H. Leitão, Tiago N. d. Santos
  • Patent number: 10719342
    Abstract: A method, system, and computer program product are disclosed for creating an in-memory application image. Embodiments can include receiving an application from a storage. Embodiments can also include loading the received application into a memory storage pool. Embodiments can also include receiving an indication of a request to execute the in-memory application image on a first virtual machine of a plurality of virtual machines. Embodiments can also include receiving an indication to execute the in-memory application image on the first virtual machine. Embodiments can also include removing the in-memory application image from the memory storage pool, in response to the receiving the indication to execute the in-memory application. Embodiments can also include assigning the removed in-memory application image to the first virtual machine.
    Type: Grant
    Filed: September 16, 2016
    Date of Patent: July 21, 2020
    Assignee: International Business Machines Corporation
    Inventors: Rafael C. S. Folco, Breno H. Leitão, Tiago N. d. Santos
  • Publication number: 20200218449
    Abstract: A computer-implemented method, a computer program product, and a computer system for journaling on an appendable non-volatile memory module. A kernel receives a request for a write operation of a file on a disk. The kernel instructs a memory management unit to perform an access control list verification. The memory management unit determines whether a user associated with the write operation is permitted to write a filesystem journal onto a non-volatile dual in-line memory module, by performing the access control list verification. The memory management unit writes the filesystem journal onto the non-volatile dual in-line memory module, in response to that the user associated with the write operation is permitted to write the filesystem journal. The kernel writes the file onto the disk.
    Type: Application
    Filed: January 3, 2019
    Publication date: July 9, 2020
    Inventors: Breno H. Leitao, Juscelino Candido de Lima Junior, Carlos Eduardo Seo
  • Patent number: 10678617
    Abstract: The method includes identifying, by one or more computer processors, a first container with first software stack and a valid multipath configuration, wherein the first software stack is a first path of the valid multipath configuration. The method further includes creating, by one or more computer processors, a second container, wherein the second container has the same rules as the first container. The method further includes creating, by one or more computer processes, a second software stack in the second container, wherein the software stack is a redundant software stack of the first software stack. The method further includes creating, by one or more computer processors, a second path from the first container to the second software stack, wherein the second path bypasses the first software stack.
    Type: Grant
    Filed: December 28, 2018
    Date of Patent: June 9, 2020
    Assignee: International Business Machines Corporation
    Inventors: Rafael C. S. Folco, Breno H. Leitao, Desnes A. Nunes do Rosario, Jose F. Santiago Filho
  • Publication number: 20200167280
    Abstract: Embodiments of the present invention include receiving, by an operating system, a request from an application to reserve a subset of a memory allocated to the application for mirroring. The request specifies a size of the subset. A first portion of the specified size and a second portion of the specified size of the memory are reserved by the operating system for the mirroring. Data to write to the first portion of the memory is received from the application. The operating system writes the data to the first portion of the memory and initiates a background write-back process of the data to the second portion of the memory.
    Type: Application
    Filed: November 28, 2018
    Publication date: May 28, 2020
    Inventors: Breno H. Leitao, Juscelino Candido De Lima Junior, Camilla da Graca Portes Ogurtsova, Yuri Henrique Sierakowski
  • Publication number: 20200133490
    Abstract: Memory management that includes allocating physical memory having an append-only permission associated therewith to requesting user space applications is described. If a page frame is append-only, then data written to the page frame cannot be overwritten. Rather, any new data written to an append-only page frame must be written beginning at the next available write location within the page frame. An MMU determines whether a write request is requesting an append-only page frame, in which case, the MMU reserves the append-only page frame for the write request and consults a corresponding entry in a page table append to determine whether an offset associated with the write request is larger than a stored value in the entry that indicates the next available write location in the page frame. If so, the write request is executed and the data is written to the page frame beginning at the next available write location.
    Type: Application
    Filed: October 30, 2018
    Publication date: April 30, 2020
    Inventors: Breno H. Leitao, Juscelino Candido De Lima Junior, Carlos Eduardo Seo
  • Patent number: 10635605
    Abstract: Disclosed embodiments provide techniques for inter-enclave communication through shared memory. Enclaves (containers) operate in a protected memory space that inhibits the use of shared memory. Disclosed embodiments enable enclaves to use shared memory, eliminating the communication bottlenecks associated with networking. A memory cryptography coprocessor implemented in hardware generates shared memory key data for a shared memory region that is to be used by two or more enclaves. The shared memory key data is sent to the enclaves that require a shared memory interface. The enclaves access the shared memory securely utilizing the shared memory key data. The memory cryptography coprocessor facilitates shared memory key generation and exchange. The memory cryptography coprocessor data is not directly accessible by the processes executing on the main processor.
    Type: Grant
    Filed: March 13, 2018
    Date of Patent: April 28, 2020
    Assignee: International Business Machines Corporation
    Inventors: Breno H. Leitao, Mauro Sergio Martins Rodrigues, Rafael Camarda Silva Folco, Daniel Battaiola Kreling
  • Publication number: 20200125392
    Abstract: A computer-implemented method comprises receiving a request to write to a file and, in response to the request, determining that the file exists in a storage device. In response to the determination that the file exists, the method further comprises mapping the file into a region of a non-volatile dual in-line memory module (NVDIMM); initiating a transaction to write to the mapped file in the NVDIMM without acquiring a speculative lock on the mapped file; and determining whether a conflict occurred in writing to the mapped file in the NVDIMM. In response to a determination that a conflict occurred, the method comprises restarting the transaction to write to the mapped file in the NVDIMM without acquiring the speculative lock on the mapped file. In response to a determination that no conflict occurred, the method comprises committing changes made to the mapped file to the file in the storage device.
    Type: Application
    Filed: October 17, 2018
    Publication date: April 23, 2020
    Inventors: Breno H. Leitao, Juscelino Candido De Lima Junior, Camilla da Graca Portes Ogurtsova, Alexander Aguina
  • Patent number: 10620959
    Abstract: In an approach for moving workloads between central processing units (CPUs) to accommodate balance, a processor profiles a first processor and a second processor of a plurality of processors, using a cycle per instruction metric. A processor assigns a first group of instructions to the first processor and a second group of instructions to the second processor. A processor sums an instruction count for the first group of instructions and an instruction count for the second group of instructions. A processor determines that a balance condition, defined by a predetermined threshold, does not exist across the first processor and the second processor. A processor identifies the second processor has a lower cycle per instruction metric than the first processor. A processor moves a workload, running on the first processor, with a maximum number of instructions of an unbalanced group to the second processor to balance workloads.
    Type: Grant
    Filed: December 1, 2017
    Date of Patent: April 14, 2020
    Assignee: International Business Machines Corporation
    Inventors: Rafael Camarda Silva Folco, Jose F. Santiago Filho, Desnes A. Nunes do Rosário, Breno H. Leitao
  • Publication number: 20200097254
    Abstract: Embodiments include method, systems and computer program products for providing entropy to generate random numbers.
    Type: Application
    Filed: September 25, 2018
    Publication date: March 26, 2020
    Inventors: BRENO H. LEITAO, JUSCELINO CANDIDO DE LIMA JUNIOR, ALEXANDER AGUINA, CAMILLA da GRACA PORTES OGURTSOVA
  • Patent number: 10587412
    Abstract: Aspects provide for a virtual machine structure wherein processors are configured to create an encrypted code virtualization machine for code machine instructions of a retrieved package that has a security field value that indicates secure code, wherein the code machine instructions of the first retrieved package are allocated to encrypted code memory regions of a computer memory resource. Configured processors further create a non-encrypted code virtualization machine in non-encrypted code memory regions of a computer memory resource comprising code machine instructions of another retrieved package that has a security field value that does not indicate secure code; and define a union mixed secure virtual machine image to include (as a function of) the encrypted code virtualization machine and the non-encrypted code virtualization machine.
    Type: Grant
    Filed: November 7, 2017
    Date of Patent: March 10, 2020
    Assignee: International Business Machines Corporation
    Inventors: Juscelino Candido De Lima Junior, Breno H. Leitao, Fabio M. Tanada
  • Publication number: 20200034295
    Abstract: Systems and methods for cache balance when using hardware transactional memory are disclosed. A method includes: determining, by a computing device, a hardware transactional memory (HTM) attrition rate for a workload in a distributed computing environment; determining, by the computing device, whether or not the HTM attrition rate for the workload exceeds a predetermined threshold; and in response to determining that the HTM attrition rate for the workload does not exceed the predetermined threshold, the computing device causing a requested HTM transaction to begin.
    Type: Application
    Filed: July 30, 2018
    Publication date: January 30, 2020
    Inventors: Daniel BATTAIOLA KRELING, Breno H. LEITAO, Mauro Sergio MARTINS RODRIGUES, Rafael CAMARDA SILVA FOLCO
  • Publication number: 20200026652
    Abstract: Systems and methods for improved process caching through iterative feedback are disclosed. In embodiments, a computer implemented method comprises retrieving updated metadata of a process to be executed, wherein the updated metadata includes information regarding cache misses from a prior execution of the process; automatically modifying a setting of a data stream control register based on the updated metadata; automatically setting a hint at a data cache block touch module; performing an initial execution of the process after the steps of retrieving the updated metadata, automatically modifying the setting of the data stream control register, and automatically setting the hint at the data cache block touch module; and modifying the updated metadata of the process after the execution of the process based on cache miss statistical data gathered during the execution of the process, to produce newly updated metadata.
    Type: Application
    Filed: September 30, 2019
    Publication date: January 23, 2020
    Inventors: Mauro Sergio MARTINS RODRIGUES, Rafael CAMARDA SILVA FOLCO, Daniel BATTAIOLA KRELING, Breno H. LEITAO
  • Publication number: 20200004568
    Abstract: A method and system for improving virtual machine allocation and migration is provided. The method includes initiating a migration process for migrating database files of a virtual machine from a first hardware device to a second hardware device. A checkpoint and restart command is transmitted to a first hypervisor of the first hardware device and a request for a cryptographic key from a memory encryption engine is received. The cryptographic key is transmitted to a first enclave and the first enclave is encrypted resulting in an encrypted enclave. A resulting a data file comprising the database files is generated and the encrypted enclave is disconnected from the first hardware device. The encrypted enclave is destroyed and checkpoint and restart code is executed for restarting the first hardware device.
    Type: Application
    Filed: June 27, 2018
    Publication date: January 2, 2020
    Inventors: Juscelino C. Candido de Lima, JR., Breno H. Leitao, Fabio M. Tanada
  • Publication number: 20190392045
    Abstract: A system and method for tailoring container images stored in a container image registry to a specific microarchitecture that a host operating system is running on in a virtualized environment includes sending a container image fetch request to the container image registry, receiving microarchitecture identification instructions from the image registry in response to the container image fetch request, the microarchitecture identification instructions configured to be run on the host operating system, transmitting results from the microarchitecture identification instructions to the container image registry to identify the specific microarchitecture that the host operating system is running on in the virtualized environment, and starting a container within the virtualized environment using an optimal container image received from the container image registry, the optimal container image being tailored to the specific microarchitecture to leverage as many functionalities and capabilities of the specific microarc
    Type: Application
    Filed: June 20, 2018
    Publication date: December 26, 2019
    Inventors: Juscelino Candido De Lima Junior, Breno H. Leitao, Fabio M. Tanada
  • Publication number: 20190384923
    Abstract: Secure memory sharing between enclaves (virtual machines) and virtual input/output adapters includes, in response to a request for an enclave to create a virtual input/output adapter, creating a virtual input/output adapter associated with the enclave, creating a non-sharable micro-enclave, to contain only data, nested within the enclave to use with the virtual input/output adapter, generating a key by a memory encryption engine of an ultravisor for the virtual input/output adapter for use by only the virtual input/output adapter, in response to a request to obtain data from the enclave by the virtual input/output adapter, exchanging the key with the non-sharable micro-enclave, in response to receiving the key, decrypting memory of only the non-sharable micro-enclave associated with the virtual input/output adapter to obtain the data, and sending the data from the non-sharable micro-enclave nested within the enclave to the virtual input/output adapter.
    Type: Application
    Filed: June 13, 2018
    Publication date: December 19, 2019
    Inventors: Breno H. LEITAO, Mauro Sergio MARTINS RODRIGUES, Daniel BATTAIOLA KRELING, Rafael CAMARDA SILVA FOLCO