Abstract: A method of fabricating a color filter array including the removal of unwanted residual color pigments. A substrate is coated with a colored photoresist layer. The photoresist layer is patterned. The substrate is then cured. A descumming step is performed after the curing step to remove the residual pigments without causing significant damage to the remaining color filter array pattern. In another embodiment, the descumming process may be used to control or manipulate the thickness of the color filter array. In another embodiment, the descumming process may be used to modify the surface of the color filter array to be more desirable for the formation of microlenses or other layers over the color filter array.

Abstract: A capacitor construction includes a first electrode and a layer between the first electrode and a surface supporting the capacitor construction. The capacitor construction can exhibit a lower RC time constant compared to an otherwise identical capacitor construction lacking the layer. Alternatively, or additionally, the first electrode may contain Si and the layer may limit the Si from contributing to formation of metal silicide material between the first electrode and the supporting surface. The layer may be a nitride layer and may be conductive or insulative. When conductive, the layer may exhibit a first conductivity greater than a second conductivity of the first electrode. The capacitor construction may be used in memory devices.

Abstract: A method of fabricating a color filter array including the removal of unwanted residual color pigments. A substrate is coated with a colored photoresist layer. The photoresist layer is patterned. The substrate is then cured. A descumming step is performed after the curing step to remove the residual pigments without causing significant damage to the remaining color filter array pattern. In another embodiment, the descumming process may be used to control or manipulate the thickness of the color filter array. In another embodiment, the descumming process may be used to modify the surface of the color filter array to be more desirable for the formation of microlenses or other layers over the color filter array.

Abstract: A method of fabricating a color filter array including the removal of unwanted residual color pigments. A substrate is coated with a colored photoresist layer. The photoresist layer is patterned. The substrate is then cured. A descumming step is performed after the curing step to remove the residual pigments without causing significant damage to the remaining color filter array pattern. In another embodiment, the descumming process may be used to control or manipulate the thickness of the color filter array. In another embodiment, the descumming process may be used to modify the surface of the color filter array to be more desirable for the formation of microlenses or other layers over the color filter array.

Abstract: A method of implanting, for example, a phosphorous plug over a charge collection region and a method of forming a contact over the phosphorous plug implant and charge collection region. The method allows implantation of phosphorous or other materials without contamination of other contact regions. The method further allows implantation of a material with only one step and without an extra masking step.

Abstract: A method of fabricating a color filter array including the removal of unwanted residual color pigments. A substrate is coated with a colored photoresist layer. The photoresist layer is patterned. The substrate is then cured. A descumming step is performed after the curing step to remove the residual pigments without causing significant damage to the remaining color filter array pattern. In another embodiment, the descumming process may be used to control or manipulate the thickness of the color filter array. In another embodiment, the descumming process may be used to modify the surface of the color filter array to be more desirable for the formation of microlenses or other layers over the color filter array.

Abstract: A method of implanting, for example, a phosphorous plug over a charge collection region and a method of forming a contact over the phosphorous plug implant and charge collection region. The method allows implantation of phosphorous or other materials without contamination of other contact regions. The method further allows implantation of a material with only one step and without an extra masking step.

Abstract: A method used during the formation of a semiconductor device comprises forming a first portion of a digit line contact plug before forming storage capacitors. Subsequent to forming storage capacitors, a second portion of the digit line plug is formed to contact the first portion, then the digit line runner is formed to contact the second plug portion. A structure resulting from the process is also described.

Abstract: A pixel cell having two capacitors connected in series where each capacitor has a capacitance approximating that of the periphery capacitors and such that the effective capacitance of the series capacitors is smaller than that of each of the periphery capacitors. The series-connected capacitors are coupled to the floating diffusion (FD) region for receiving “surplus” charge from the FD region during saturation conditions.

Abstract: A capacitor construction includes a first electrode and a layer between the first electrode and a surface supporting the capacitor construction. The capacitor construction can exhibit a lower RC time constant compared to an otherwise identical capacitor construction lacking the layer. Alternatively, or additionally, the first electrode may contain Si and the layer may limit the Si from contributing to formation of metal silicide material between the first electrode and the supporting surface. The layer may be a nitride layer and may be conductive or insulative. When conductive, the layer may exhibit a first conductivity greater than a second conductivity of the first electrode. The capacitor construction may be used in memory devices.

Abstract: A method of implanting, for example, a phosphorous plug over a charge collection region and a method of forming a contact over the phosphorous plug implant and charge collection region. The method allows implantation of phosphorous or other materials without contamination of other contact regions. The method further allows implantation of a material with only one step and without an extra masking step.

Abstract: A method of implanting, for example, a phosphorous plug over a charge collection region and a method of forming a contact over the phosphorous plug implant and charge collection region. The method allows implantation of phosphorous or other materials without contamination of other contact regions. The method further allows implantation of a material with only one step and without an extra masking step.

Abstract: A pixel cell having two capacitors connected in series where each capacitor has a capacitance approximating that of the periphery capacitors and such that the effective capacitance of the series capacitors is smaller than that of each of the periphery capacitors. The series-connected capacitors are coupled to the floating diffusion (FD) region for receiving “surplus” charge from the FD region during saturation conditions.

Abstract: A capacitor construction includes a first electrode and a layer between the first electrode and a surface supporting the capacitor construction. The capacitor construction can exhibit a lower RC time constant compared to an otherwise identical capacitor construction lacking the layer. Alternatively, or additionally, the first electrode may contain Si and the layer may limit the Si from contributing to formation of metal silicide material between the first electrode and the supporting surface. The layer may be a nitride layer and may be conductive or insulative. When conductive, the layer may exhibit a first conductivity greater than a second conductivity of the first electrode. The capacitor construction may be used in memory devices.

Abstract: A method used during the formation of a semiconductor device comprises forming a first portion of a digit line contact plug before forming storage capacitors. Subsequent to forming storage capacitors, a second portion of the digit line plug is formed to contact the first portion, then the digit line runner is formed to contact the second plug portion. A structure resulting from the process is also described.

Abstract: A pixel cell having two capacitors connected in series where each capacitor has a capacitance approximating that at of the periphery capacitors and such that the effective capacitance of the series capacitors is smaller than that of each of the periphery capacitors. The series-connected capacitors are coupled to the floating diffusion (FD) region for receiving “surplus” charge from the FD region during saturation conditions.

Abstract: A method used during the formation of a semiconductor device comprises forming a first portion of a digit line contact plug before forming storage capacitors. Subsequent to forming storage capacitors, a second portion of the digit line plug is formed to contact the first portion, then the digit line runner is formed to contact the second plug portion. A structure resulting from the process is also described.

Abstract: Semiconductor structures formed using redeposition of an etchable layer. A starting material is etched and redeposited during the etch on a sidewall of a foundation. The foundation may be removed or may form an integral part of the structure. The starting material may contain one or more layers of material. The structures are adapted for a variety of capacitor structures.

Abstract: A method for forming a structure by redepositing a starting material on sidewalls of a foundation during an etch of the starting material.

Abstract: A method used during the formation of a semiconductor device comprises forming a first portion of a digit line contact plug before forming storage capacitors. Subsequent to forming storage capacitors, a second portion of the digit line plug is formed to contact the first portion, then the digit line runner is formed to contact the second plug portion. A structure resulting from the process is also described.