Abstract: Techniques for over the air (OTA) microcontroller flash memory updates using a wireless network are disclosed herein. A control node first transmits the microcontroller flash memory update to all devices that can receive the message. Each packet of the message is relayed through multiple communication levels until all devices receive the packet. This starts with communications from the control node to each device node that has a direct communication path to the control node, which are referred to herein as “first level” device nodes. The first level device nodes then relay each communication to each other device node that has a direct communication path to the first level device nodes, which are referred to herein as “second level” device nodes. This process is repeated at each level of the wireless network until each of the plurality of device nodes has received the microcontroller flash memory update.

Abstract: Techniques for over the air (OTA) microcontroller flash memory updates using a wireless network are disclosed herein. A control node first transmits the microcontroller flash memory update to all devices that can receive the message. Each packet of the message is relayed through multiple communication levels until all devices receive the packet. This starts with communications from the control node to each device node that has a direct communication path to the control node, which are referred to herein as “first level” device nodes. The first level device nodes then relay each communication to each other device node that has a direct communication path to the first level device nodes, which are referred to herein as “second level” device nodes. This process is repeated at each level of the wireless network until each of the plurality of device nodes has received the microcontroller flash memory update.

Abstract: The system includes a number of first meters, which are typically battery powered transmit only devices. The system includes a number of two-way meters, which are operable to both transmit and receive data. The first meters transmit their data to the collector either directly or indirectly via the two-way meters, which serve as intermediaries. Multiple records from each first meter may be stored at each of the two-way meters, thereby ensuring that records from a one-way meter will not be blocked when an attempt is made to forward them to the collector. Furthermore, multiple records from each first meter may be stored at the collector, thereby enabling the transmission and storage of meter records in a number of different formats. Additionally, records from each first meter are marked to reflect a sequence in which they are generated, thereby ensuring that the collector will store the most recent data records available.

Abstract: The present invention is directed to a frequency hopping spread spectrum transceiver. The transceiver includes a microcontroller; a transmitter having a voltage controlled oscillator, a direct digital synthesizer, and a power amplifier; and a receiver having an amplifier, a mixer, an IF amplifier, a demodulator, and a data slicer. When transmitting, the transmitter sends a preamble that allows the receiving device to detect the signal and lock to it to receive the data. When receiving, the receiver first scans all channels and sorts them based on a Received Signal Strength Indicator (RSSI) and then attempts to lock to the channel with the strongest RSSI value by first sampling the received signal to verify the preamble, then synchronizing to the bit edges of the received signal, then detecting the start of a Start Frame Delimiter (SFD), decoding bits to verify a valid SFD and then sampling data bits to receive the data.

Abstract: The present invention is directed to a frequency hopping spread spectrum transceiver. The transceiver includes a microcontroller; a transmitter having a voltage controlled oscillator, a direct digital synthesizer, and a power amplifier; and a receiver having an amplifier, a mixer, an IF amplifier, a demodulator, and a data slicer. When transmitting, the transmitter communicates a preamble over a predetermined number of preamble channels, and thereafter communicate groups of data bytes that each comprise a subset of the data message over a predetermined sequence of data channels. When receiving, the receiver investigates the predetermined number of preamble channels to search for the preamble and tests the received bits to insure that the preamble and a start frame delimiter have been properly received to synchronize the receiver with the transmitter.

Abstract: The present invention is directed to a frequency hopping spread spectrum transceiver. The transceiver includes a microcontroller; a transmitter having a voltage controlled oscillator, a direct digital synthesizer, and a power amplifier; and a receiver having an amplifier, a mixer, an IF amplifier, a demodulator, and a data slicer. When transmitting, the transmitter sends a preamble that allows the receiving device to detect the signal and lock to it to receive the data. When receiving, the receiver first scans all channels and sorts them based on a Received Signal Strength Indicator (RSSI) and then attempts to lock to the channel with the strongest RSSI value by first sampling the received signal to verify the preamble, then synchronizing to the bit edges of the received signal, then detecting the start of a Start Frame Delimiter (SFD), decoding bits to verify a valid SFD and then sampling data bits to receive the data.

Abstract: The present invention is directed to a frequency hopping spread spectrum transceiver. The transceiver includes a microcontroller; a transmitter having a voltage controlled oscillator, a direct digital synthesizer, and a power amplifier; and a receiver having an amplifier, a mixer, an IF amplifier, a demodulator, and a data slicer. When transmitting, the transmitter communicates a preamble over a predetermined number of preamble channels, and thereafter communicate groups of data bytes that each comprise a subset of the data message over a predetermined sequence of data channels. When receiving, the receiver investigates the predetermined number of preamble channels to search for the preamble and tests the received bits to insure that the preamble and a start frame delimiter have been properly received to synchronize the receiver with the transmitter.