Patents by Inventor Brent R. Jensen

Brent R. Jensen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7660563
    Abstract: A circuit including a subcircuit having differential signals, and a feedback circuit coupled to the subcircuit. The feedback circuit is configured to measure an offset between the differential signals, to generate a calibration signal in response to the measurement, and to reduce the offset in response to the calibration signal.
    Type: Grant
    Filed: September 18, 2006
    Date of Patent: February 9, 2010
    Assignee: Cypress Semiconductor Corporation
    Inventors: Mark R. Gehring, Brent R. Jensen
  • Patent number: 7564923
    Abstract: A transmitter digital signal processor (DSP) circuit has a transmit frequency represented by n-bit data output from a look up table (LUT). The n-bit data is outputted to an n-bit accumulator structured to overflow at a rate based on the output n-bit data to output a phase. The circuit further has device structured to add an n-bit signed constant to the accumulator to offset the frequency represented by the n-bit data output from the LUT. A transceiver on a semiconductor chip may include as part of a transmitter circuit, a transmit DSP circuit that has the LUT, accumulator and device providing an n-bit signed constant to the accumulator to offset a transmit frequency in order to allow a receiver circuit on the transceiver to communicate directly with the transmitter circuit, and thus allowing testing of the transceiver.
    Type: Grant
    Filed: October 27, 2005
    Date of Patent: July 21, 2009
    Assignee: Cypress Semiconductor Corporation
    Inventors: Mark R. Gehring, Russell R. Moen, Brent R. Jensen
  • Publication number: 20080162226
    Abstract: A system for facilitating supplier qualification and quality management functions includes an application executing on a host system and a web-based user interface provided by the application, the web-based user interface collaboratively enabling qualification of suppliers, parts, and technologies over a network. The system also includes a shared data repository and a workstation in communication with the host system, and a supplier in communication with the host system via the user interface and network. The collaborative qualification includes acquiring supplier capabilities, part data, and supplier technology data from a collaborative source via the user interface. The collaborative qualification also includes storing acquired data in the shared data repository, and performing quality management functions via the user interface and shared data repository.
    Type: Application
    Filed: January 2, 2008
    Publication date: July 3, 2008
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: John S. Maresca, Robert D. Hayes, Brent R. Jensen, Edward Kobeda, Eric T. Lambert, Katherine J. Pearsall, Benjamin J. Steele, Michael J. Whitney, Paul A. Zulpa
  • Patent number: 7353497
    Abstract: An exemplary embodiment of the invention relates to an integrated computer-based method and system for facilitating supplier qualification and quality management. This computer-based method and system includes a host system receiving a request from a user system to execute supplier qualification and quality management software, executing the requested software at the host system, sending results of the software execution to the user system, receiving input at the host system from the user system in response to the software execution, and providing the user system with output generated as a result of executing the software. The supplier qualification and quality management software includes a selection module, a qualification module and a quality module.
    Type: Grant
    Filed: December 29, 2000
    Date of Patent: April 1, 2008
    Assignee: International Business Machines Corporation
    Inventors: John S. Maresca, Robert D. Hayes, Brent R. Jensen, Edward Kobeda, Eric T. Lambert, Katherine J. Pearsall, Benjamin J. Steele, Jr., Michael J. Whitney, Paul A. Zulpa
  • Patent number: 6949935
    Abstract: A system and method of testing switch functionality of a tunable capacitor array is disclosed. A built in test (BIT) circuit provides digital device for testing the functionality of a programmable switch capacitor array circuit. The method and system provides for switching a capacitor switch of a switch capacitor array between on and off, switching a test enable switch of a BIT circuit between on and off, pulling an internal node of the BIT circuit either high or low using a current source, and determining whether the internal node has been pulled either high or low. In addition, the method and system provides for making a pass or fail determination based on a determined state of the internal node.
    Type: Grant
    Filed: November 1, 2002
    Date of Patent: September 27, 2005
    Assignee: Cypress Semiconductor Corp.
    Inventors: Joseph D. Stenger, Brent R. Jensen
  • Patent number: 6842710
    Abstract: A method and system for calibrating a time constant within an integrated circuit. A voltage storage element is charged, and the time required to achieve a reference voltage on the storage element is measured. The measured time is compared to a desired time. It necessary, an adjustable impedance is modified to change the charging time, and the cycle may be repeated until the charging time matches the desired time. In this novel manner, an actual RC time constant, as rendered in a particular integrated circuit, is measured and potentially adjusted to match a desired time constant. Advantageously, configuration information of the adjustable impedance may be communicated to other circuitry within the integrated circuit to enable such circuitry to implement the same RC time constant in analog signal processing. Consequently, embodiments of the present invention overcome incidences of wide tolerance in passive components implemented in integrated circuits. Beneficially, no external test equipment is required.
    Type: Grant
    Filed: August 22, 2002
    Date of Patent: January 11, 2005
    Assignee: Cypress Semiconductor Corporation
    Inventors: Mark Richard Gehring, Brent R. Jensen
  • Patent number: 6819185
    Abstract: A method and an apparatus are described for providing biasing for an amplifier. In an embodiment invention, a bias network comprises an integration circuit to sense a voltage change for an amplifier. The bias network adjusts a bias voltage for the amplifier in response to the voltage change.
    Type: Grant
    Filed: November 13, 2002
    Date of Patent: November 16, 2004
    Assignee: Cypress Semiconductor Corporation
    Inventor: Brent R. Jensen
  • Publication number: 20020087372
    Abstract: An exemplary embodiment of the invention relates to an integrated computer-based method and system for facilitating supplier qualification and quality management. This computer-based method and system includes a host system receiving a request from a user system to execute supplier qualification and quality management software, executing the requested software at the host system, sending results of the software execution to the user system, receiving input at the host system from the user system in response to the software execution, and providing the user system with output generated as a result of executing the software. The supplier qualification and quality management software includes a selection module, a qualification module and a quality module.
    Type: Application
    Filed: December 29, 2000
    Publication date: July 4, 2002
    Applicant: International Business Machines Corporation
    Inventors: John S. Maresca, Robert D. Hayes, Brent R. Jensen, Edward Kobeda, Eric T. Lambert, Michael J. Whitney, Katherine J. Pearsall, Benjamin J. Steele Jr., Paul A. Zulpa
  • Patent number: 5724003
    Abstract: A method for obtaining a rectified signal from a first alternating current signal. The method includes the step of inputting the first alternating current signal into a variable gain amplifier to obtain a second alternating current signal. The second alternating current signal has a substantially constant peak-to-peak voltage irrespective of a power level of the first alternating current signal. The method further includes the step of rectifying the second alternating current signal, using a power detector circuit, to obtain the rectified signal, whereby a direct current level of the rectified signal is substantially proportional to the power level of the first alternating current irrespective of the power level of the first alternating current. The rectified signal may then be employed in, for example, a feedback control circuit to control the amount of power output by an RF signal source.
    Type: Grant
    Filed: December 29, 1995
    Date of Patent: March 3, 1998
    Assignee: Maxim Integrated Products, Inc.
    Inventors: Brent R. Jensen, James W. H. Marsh
  • Patent number: 5677561
    Abstract: A temperature compensated logarithmic detector biased with a proportional to absolute temperature (PTAT) voltage produced in accordance with an area ratio of biasing transistors is disclosed. According to one implementation of the invention, the temperature compensated logarithmic detector includes biasing circuitry and a logarithmic detector cell. The biasing circuitry receives an input signal and produces a PTAT bias voltage from the input signal. The PTAT characteristic of the PTAT bias voltage is produced by an area ratio. The logarithmic detector cell converts the input signal to a logarithmic output signal in accordance with a logarithmic transfer function over a narrow range.
    Type: Grant
    Filed: February 7, 1996
    Date of Patent: October 14, 1997
    Assignee: Maxim Integrated Products, Inc.
    Inventor: Brent R. Jensen
  • Patent number: 5672961
    Abstract: A current source includes a control stage responsive to a stable, d.c. input voltage that is operative to produce a control voltage proportional to absolute temperature (PTAT), and an output stage responsive to the PTAT control voltage that is operative to produce an output current that is an essentially constant fraction of an output constant current source. The control stage includes a temperature-dependent control resistor of a given resistor type, and at least one control constant current source providing the control resistor with a temperature dependent control current. The temperature dependent current source includes a temperature dependent current source resistor based on the given resistor type such that the temperature dependencies of the control current and the control resistor tend to cancel in such a manner that a true PTAT control voltage is developed.
    Type: Grant
    Filed: December 29, 1995
    Date of Patent: September 30, 1997
    Assignee: Maxim Integrated Products, Inc.
    Inventors: David W. Entrikin, Brent R. Jensen, Benjamin J. McCarroll