Abstract: The present invention is directed to an electrodepositable coating composition comprising an electrodepositable binder comprising an ionic salt group-containing film-forming polymer comprising active hydrogen functional groups, and a blocked polyisocyanate curing agent; a solubilized bismuth catalyst; and a guanidine; wherein the electrodepositable coating composition has a weight ratio of bismuth metal from the solubilized bismuth catalyst to guanidine of from 1.00:0.071 to 1.0:2.1 and/or a molar ratio of bismuth metal to guanidine of from 1.0:0.25 to 1.0:3.0. Also disclosed are methods of treating electrodepositable coating compositions, methods for making electrodepositable coating compositions, systems for coating a metal substrate, coatings, coated substrates, and methods of coating a substrate.

Abstract: An LGA socket for receiving substrate packages of various sizes and a method of fabricating the socket. In an embodiment, the socket has a planar surface for seating a substrate package. Socket contacts are disposed on the planar surface in a layout common to the layout of interconnects formed on the bottom of substrate packages the socket is designed to receive. A plurality of socket locating features is formed on the socket body to prevent lateral displacement of a reference substrate package. A corresponding number of package locating features are formed on the substrate body of packages larger than the reference substrate package. Each of the socket locating features meshes with the corresponding package locating feature of the larger package.

Abstract: An LGA socket for receiving substrate packages of various sizes and a method of fabricating the socket. In an embodiment, the socket has a planar surface for seating a substrate package. Socket contacts are disposed on the planar surface in a layout common to the layout of interconnects formed on the bottom of substrate packages the socket is designed to receive. A plurality of socket locating features is formed on the socket body to prevent lateral displacement of a reference substrate package. A corresponding number of package locating features are formed on the substrate body of packages larger than the reference substrate package. Each of the socket locating features meshes with the corresponding package locating feature of the larger package.

Abstract: A hybrid electronic circuit package (102, FIG. 1) includes non-insertable conductive features (110) and insertable conductive features (112) at a surface of the package. A hybrid receptacle (120), such as a socket, for example, includes non-insertable contacts (124) and insertable contacts (126), which are positioned in a complementary manner with the non-insertable and insertable features of the package. A vertical securement device (132, 134, 136) applies a vertical compressive force to the package (102) to compress the non-insertable features (110) against the non-insertable contacts (124). Further, a normal force securement device can be used to provide a sustained normal force to compress the insertable features and contacts together. In one embodiment, the non-insertable features are land grid array lands and the insertable features are low insertion force features.

Abstract: A socket and package apparatus are disclosed for increasing the amount of power that can be delivered from an IC board to an IC where the IC package is mounted in a socket connected to the IC board. In one embodiment, the IC package includes a first power plane along with a power carrier and one or more pin receptacles. The power bar carrier includes a first conducting panel that is electrically coupled to the first power plane along a first adjacent edge. The first conducting panel is also electrically coupled to a first plurality of conducting pads.

Abstract: A hybrid electronic circuit package (102, FIG. 1) includes non-insertable conductive features (110) and insertable conductive features (112) at a surface of the package. A hybrid receptacle (120), such as a socket, for example, includes non-insertable contacts (124) and insertable contacts (126), which are positioned in a complementary manner with the non-insertable and insertable features of the package. A vertical securement device (132, 134, 136) applies a vertical compressive force to the package (102) to compress the non-insertable features (110) against the non-insertable contacts (124). Further, a normal force securement device can be used to provide a sustained normal force to compress the insertable features and contacts together. In one embodiment, the non-insertable features are land grid array lands and the insertable features are low insertion force features.

Abstract: A hybrid electronic circuit package (102, FIG. 1) includes non-insertable conductive features (110) and insertable conductive features (112) at a surface of the package. A hybrid receptacle (120), such as a socket, for example, includes non-insertable contacts (124) and insertable contacts (126), which are positioned in a complementary manner with the non-insertable and insertable features of the package. A vertical securement device (132, 134, 136) applies a vertical compressive force to the package (102) to compress the non-insertable features (110) against the non-insertable contacts (124). Further, a normal force securement device can be used to provide a sustained normal force to compress the insertable features and contacts together. In one embodiment, the non-insertable features are land grid array lands and the insertable features are low insertion force features.

Abstract: A grounded conductive plate in a land grid array package assembly includes a plurality of openings. The openings allow contacts from the socket to pass through to contact a package. The diameter of each opening is customizable to produce desired impedance between the contacts and the conductive plate. Impedance discontinuity seen by signals passing through the socket may be reduced.

Abstract: A socket cover with a recessed center, method for using such a socket cover and system using such a socket cover are described herein.

Abstract: A socket and package apparatus are disclosed for increasing the amount of power that can be delivered from an IC board to an IC where the IC package is mounted in a socket connected to the IC board. The apparatus has two separable and distinct parts designed to electrically engage. The package is designed with a power bar where the panels of the power bar are permanently and electrically connected to various power planes of the IC package along its entire adjacent wall. The socket is designed with a power bar carrier designed to maximize the current flow from the IC board to the power bar. The package is then engaged into the socket.

Abstract: A electrical interface for an electronic package, using lands on the package which are non-planar with metal layers within the package. This non-planar or tilted land grid array (TLGA) package is assembled with a complementary TLGA socket to make electronic connection to the package.

Abstract: An integrated circuit package includes a first capacitor supported by a surface of a substrate, and a second capacitor supported by the surface of the substrate. The first capacitor is within a die shadow region, and the second capacitor lies outside of the die shadow region.

Abstract: A system may include an integrated circuit package having a package power contact and a package ground contact, and an interposer to physically receive a portion of the package and including a lip. A system may also include a first card having a card power contact to interface with the package power contact and a card ground contact to interface with the package ground contact, where the first card defines an opening to receive a portion of the interposer, and the lip is to support a portion of the first card.

Abstract: A socket and package apparatus are disclosed for increasing the amount of power that can be delivered from an IC board to an IC where the IC package is mounted in a socket connected to the IC board. In one embodiment, the IC package includes a first power plane along with a power carrier and one or more pin receptacles. The power bar carrier includes a first conducting panel that is electrically coupled to the first power plane along a first adjacent edge. The first conducting panel is also electrically coupled to a first plurality of conducting pads.

Abstract: A microelectronic device package including an electrically conductive lid having an attachment surface, a substrate having an attachment surface, at least one interconnect extending between the lid attachment surface and the substrate attachment surface, at least one microelectronic die disposed between the lid attachment surface and the substrate attachment surface, and the substrate having at least one first conductive trace extending between the electrically conductive first interconnect and the microelectronic die. The microelectronic device package allows for the use of the electrically conductive lid as a path for conducting signals (preferably power or ground) to and/or from a microelectronic die.

Abstract: According to one embodiment, an apparatus is disclosed. The apparatus includes a printed circuit board (PCB), a connector mounted on the PCB, and an integrated circuit (IC) package for insertion into the connector. The IC package includes a plurality of lands having a varied pitch distance.

Abstract: A system may include an integrated circuit package having a package power contact and a package ground contact, and an interposer to physically receive a portion of the package and including a lip. A system may also include a first card having a card power contact to interface with the package power contact and a card ground contact to interface with the package ground contact, where the first card defines an opening to receive a portion of the interposer, and the lip is to support a portion of the first card.

Abstract: The present invention relates to apparatus and methods for providing a low resistance power supply to a microelectronic package through the use of dual conductive paths. A first conductive path contained within the substrate and supplies current, primarily in responding to transient current demands to the microelectronic package. A lower resistance second conductive path supplies primarily steady state current to the microelectronic package through an electrical connection to an edge of the microelectronic package. Resistance in the second conductive path is reduced by using a power clamp to connect the second power supply to the microelectronic package.

Abstract: A hybrid electronic circuit package (102, FIG. 1) includes non-insertable conductive features (110) and insertable conductive features (112) at a surface of the package. A hybrid receptacle (120), such as a socket, for example, includes non-insertable contacts (124) and insertable contacts (126), which are positioned in a complementary manner with the non-insertable and insertable features of the package. A vertical securement device (132, 134, 136) applies a vertical compressive force to the package (102) to compress the non-insertable features (110) against the non-insertable contacts (124). Further, a normal force securement device can be used to provide a sustained normal force to compress the insertable features and contacts together. In one embodiment, the non-insertable features are land grid array lands and the insertable features are low insertion force features.

Abstract: In one embodiment there is provided a motherboard assembly. The motherboard assembly comprises a motherboard substrate; a conductive circuit on a first side of the motherboard substrate comprising an interface to connect the conductive circuit to an electrical component; and a power leveling element aligned with the interface and mounted to a second side of the motherboard substrate opposite the first side, the power leveling element being to level power delivery from the interface.