Patents by Inventor Bret Olszewski

Bret Olszewski has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20060130062
    Abstract: Scheduling threads in a multi-threaded computer including selecting for awakening a thread that is waiting for a lock, the thread having an assigned virtual processor; determining whether the assigned virtual processor is running; and if the assigned virtual processor is not running, assigning the thread to run on another virtual processor. Selecting a thread may include selecting the thread according to thread priority or selecting the thread according to sequence of thread arrival in a wait queue. Selecting a thread may include selecting a thread having an assigned virtual processor that is running. Selecting a thread may include selecting a thread having an assigned virtual processor that is running and has at least a predetermined amount of time remaining in its current time slice.
    Type: Application
    Filed: December 14, 2004
    Publication date: June 15, 2006
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Dean Burdick, Bret Olszewski
  • Publication number: 20060069938
    Abstract: A power level monitor and performance tracking tool are provided for correlating system performance with processor management events. When power management requires a change to the state of a microprocessor, software will be notified. Multiple layers of software may be notified, including a firmware level, an operating system, as well as applications. The performance tracking tool tracks the times of the power management events as well as their impact to the microprocessor performance. The performance tracking tool may then display or record the state changes to processor performance. These changes may be correlated against other system events to aid in determining system performance problems with respect to power management.
    Type: Application
    Filed: September 30, 2004
    Publication date: March 30, 2006
    Applicant: International Business Machines Corporation
    Inventors: Bret Olszewski, Luc Smolders, Randal Swanberg
  • Publication number: 20060048160
    Abstract: A method, apparatus, and computer program product are disclosed for dynamically determining when to yield a processor that is assigned to perform particular work but that is currently idle. A particular processor is assigned to perform work. A determination is made regarding whether the processor is currently idle. If the processor is currently idle, a determination is made of a length of time the processor has been idle. If this determined length of time exceeds a self-tunable threshold, the processor is yielded to make the processor available to perform other work. The threshold can be dynamically tuned during runtime.
    Type: Application
    Filed: September 2, 2004
    Publication date: March 2, 2006
    Applicant: International Business Machines Corporation
    Inventors: Bret Olszewski, Randal Swanberg
  • Publication number: 20060020738
    Abstract: A fork system call by a first process is detected. A second process is created as a replication of the first process with a second affinity. If a replication of the replicated shared library is present in the second affinity domain, effective addresses of the replication of the replicated shared library are mapped using a mapping mechanism of the present invention to physical addresses in the second affinity domain.
    Type: Application
    Filed: July 22, 2004
    Publication date: January 26, 2006
    Applicant: International Business Machines Corporation
    Inventors: David Hepkin, Bret Olszewski
  • Publication number: 20050268052
    Abstract: A system and method for improving dynamic memory removals by reducing the file cache size prior to the dynamic memory removal operation initiating are provided. In one exemplary embodiment, the maximum amount of physical memory that can be used to cache files is reduced prior to performing a dynamic memory removal operation. Reducing the maximum amount of physical memory that can be used to cache files causes the page replacement algorithm to aggressively target file pages to bring the size of the file cache below the new maximum limit on the file cache size. This results in more file pages, rather than working storage pages, being paged-out.
    Type: Application
    Filed: May 27, 2004
    Publication date: December 1, 2005
    Applicant: International Business Machines Corporation
    Inventors: David Hepkin, Bret Olszewski
  • Publication number: 20050198635
    Abstract: In a multiprocessor system where each processor has the capacity to executing multiple hardware threads, a method, system, and program for monitoring the percentage usage of the total capacity of the physical processors is provided. A processor capacity monitor calculates a logical usage percentage of each of the available hardware threads. In addition, the processor capacity monitor calculates a physical usage percentage of each of the processors by each of the available threads. Then, the processor capacity monitor multiplies the logical usage percentage and physical usage percentage for each of the threads and sums the result. The summed result is divided by the number of physical processors to determine the percentage usage of the total capacity of the physical processors.
    Type: Application
    Filed: February 26, 2004
    Publication date: September 8, 2005
    Applicant: International Business Machines Corporation
    Inventors: Bret Olszewski, Luc Smolders, Mysore Srinivas