Abstract: Methods of characterizing electrical properties of a semiconductor layer structure on a wafer with topside semiconductor layers on an insulating or semi-insulating substrate, the semiconductor layer structure including a high electron mobility transistor (HEMT) heterostructure with a two-dimensional electron gas (2DEG) at a heterointerface between the semiconductor layers of the heterostructure. The methods include: (a) physically contacting the topside of the wafer within a narrow border zone at an edge of the wafer with a flexible metal cantilever electrode of a contacting device, wherein the flexible metal cantilever electrode contacts one or more of the semiconductor layers exposed at the narrow border zone so that the flexible metal cantilever electrode is in electrical contact with the 2DEG; and (b) applying corona charge bias and measuring a surface voltage of the semiconductor layers using a non-contact probe while maintaining the electrical contact with the 2DEG.

Abstract: Methods of characterizing electrical properties of a semiconductor layer structure on a wafer with topside semiconductor layers on an insulating or semi-insulating substrate, the semiconductor layer structure including a high electron mobility transistor (HEMT) heterostructure with a two-dimensional electron gas (2DEG) at a heterointerface between the semiconductor layers of the heterostructure. The methods include: (a) physically contacting the topside of the wafer within a narrow border zone at an edge of the wafer with a flexible metal cantilever electrode of a contacting device, wherein the flexible metal cantilever electrode contacts one or more of the semiconductor layers exposed at the narrow border zone so that the flexible metal cantilever electrode is in electrical contact with the 2DEG; and (b) applying corona charge bias and measuring a surface voltage of the semiconductor layers using a non-contact probe while maintaining the electrical contact with the 2DEG.

Abstract: A method for measuring charging of a semiconductor wafer associated with processing the semiconductor wafer includes using a probe assembly at a charge monitoring module to measure a charge on the semiconductor wafer prior to processing the semiconductor wafer using a processing tool, the probe assembly being located proximate to a processing station of the processing tool; transferring the semiconductor wafer from the charge monitoring module to the processing station using an automated wafer handling apparatus; processing the semiconductor wafer at the processing station using the processing tool; transferring the processed wafer from the processing station back to the charge monitoring module; using the probe assembly at the charge monitoring module to measure a charge on the semiconductor wafer after processing the wafer; and analyzing the measured charge on the semiconductor wafer both before and after processing the semiconductor wafer to determine information about charging of the wafer due to processi