Abstract: Embodiments include herein are directed towards a method for electronic circuit design and more specifically towards determining return path quality in an electrical circuit. Embodiments may include providing, using a processor, an electronic circuit design and identifying at least one net associated with the electronic circuit design. Embodiments may further include extracting an ideal loop inductance for the at least one net and extracting a real loop inductance for the at least one net. Embodiments may also include calculating a return path quality factor based upon, at least in part, the ideal loop inductance and the real loop inductance.

Abstract: The present disclosure relates to a computer-implemented method for electronic design simulation. The method may include providing, at an electronic design associated with one or more computing devices, a differential pair between a driver and a receiver. The method may further include identifying one or more segments associated with the differential pair and automatically solving, using the one or more computing devices, for a dynamic phase associated with the one or more segments.

Abstract: The present disclosure relates to a method for routing in an electronic circuit design. Embodiments may include receiving, at one or more computing devices, the electronic circuit design having a plurality of terminal pads associated therewith. Embodiments may further include generating a change in at least one of a size or an existence of at least one of the plurality of terminal pads. Embodiments may also include routing a portion of the electronic design based upon, at least in part, the generated change.

Abstract: The present disclosure relates to a computer-implemented method for routing in an electronic circuit design. The method may include assigning a plurality of rats interconnecting one or more terminals associated with a layout of the electronic circuit design to a bundle. The method may further include sequencing the plurality of rats within the assigned bundle to generate a defined sequence of rats within the assigned bundle. The method may also include routing the plurality of rats between the one or more terminals, based upon, at least in part, the defined sequence.

Abstract: The present disclosure relates to a method for routing in an electronic circuit design. The method may include assigning a plurality of rats interconnecting one or more terminals associated with a layout of the electronic circuit design to a bundle. The method may also include generating an independent breakout of the plurality of rats from a source end and a target end of the bundle. The method may further include sequencing the plurality of rats within the assigned bundle to generate a defined sequence of rats within the assigned bundle based upon, at least in part, the source end of the bundle. The method may additionally include generating a costed sequence breakout at the target end of the bundle, based upon, at least in part, a costed sequence analysis. The method may also include determining if the costed sequence breakout meets at least one criteria associated with the electronic design.

Abstract: The present disclosure relates to a method for visualizing an electronic circuit design. The method may include receiving the electronic circuit design, wherein the electronic circuit design includes at least one timing constraint. The method may also include identifying the at least one timing constraint and displaying, at a graphical user interface associated with the one or more computing devices, the at least one timing constraint and a physical routing associated with the electronic circuit design. The method may further include receiving a user input associated with the electronic circuit design and dynamically updating a graphical representation of the at least one timing constraint, in response to the received user input.

Abstract: A system and method are provided for establishing an automated routing environment in an electronic design automation (EDA) work flow for the routing of a circuit design. A user may merely specify a flow via pattern, a flow via location, and a start and end terminal and thereby, the auto router or path finder will automatically find the least-cost paths between each of the start terminals through at least one intermediate via of the flow via and ending at an end terminal. Upon successful routing of all needed terminals, an at least partially routed circuit design may be output.

Abstract: Techniques that can improve the efficiency of routing where connections are subject to elongation constraints. The design can be optimized by estimating elongation needed to meet constraints after an initial routing solution has been generated, but before elongation is actually applied to detailed paths. Paths can be re-routed at this earlier stage if it is determined that too much elongation, or too much elongation in crowded areas, will need to be added after the detail routing stage.

Abstract: A system and method are provided for establishing an automated routing environment in an electronic design automation (EDA) work flow for the routing of a circuit design. A user may merely specify a flow via pattern, a flow via location, and a start and end terminal and thereby, the auto router or path finder will automatically find the least-cost paths between each of the start terminals through at least one intermediate via of the flow via and ending at an end terminal. Upon successful routing of all needed terminals, an at least partially routed circuit design may be output.