Patents by Inventor Brett Busch

Brett Busch has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230234943
    Abstract: Described herein are compounds, methods of making such compounds, pharmaceutical compositions and medicaments comprising such compounds, and methods of using such compounds for inhibiting three prime repair exonuclease 1 (“TREX1”).
    Type: Application
    Filed: June 25, 2021
    Publication date: July 27, 2023
    Inventors: Thomas Walter DUBENSKY, JR., Ryan C. CLARK, Justin ERNST, Garrick K. PACKARD, Brett BUSCH, Joe Fred NAGAMIZO, Biswajit KALITA, Athisayamani Jeyaraj DURAISWAMY
  • Publication number: 20160043089
    Abstract: Memory cell support lattices and methods of forming the same are described herein. As an example, a method of forming a memory cell support lattice includes forming a mask on a number of capacitor elements in an array, such that a space between vertically and horizontally adjacent capacitor elements is fully covered and a space between diagonally adjacent capacitor elements is partially covered and forming a support lattice in a support material by etching the support material to remove portions of the support material below the openings in the mask.
    Type: Application
    Filed: October 7, 2015
    Publication date: February 11, 2016
    Inventors: Zhimin Song, Che-Chi Lee, Brett Busch
  • Patent number: 9184167
    Abstract: Memory cell support lattices and methods of forming the same are described herein. As an example, a method of forming a memory cell support lattice includes forming a mask on a number of capacitor elements in an array, such that a space between vertically and horizontally adjacent capacitor elements is fully covered and a space between diagonally adjacent capacitor elements is partially covered and forming a support lattice in a support material by etching the support material to remove portions of the support material below the openings in the mask.
    Type: Grant
    Filed: August 21, 2012
    Date of Patent: November 10, 2015
    Assignee: Micron Technology, Inc.
    Inventors: Zhimin Song, Che-Chi Lee, Brett Busch
  • Patent number: 8871103
    Abstract: A blanket stop layer is conformally formed on a layer with a large step height. A first chemical mechanical polishing process is performed to remove the blanket stop layer atop the layer in the raised region. A second chemical mechanical polishing process is performed to planarize the wafer using the blanket stop layer as a stop layer when the layer is lower than or at a same level as the blanket stop layer or using the layer as a stop layer when the blanket stop layer is lower than or at a same level as the layer, or a selective dry etch is performed to remove the layer in the raised region. Thus, the layer in the raised region can be easily removed without occurrence of dishing in the non-raised region which is protected by the blanket stop layer.
    Type: Grant
    Filed: October 9, 2013
    Date of Patent: October 28, 2014
    Assignee: Nanya Technology Corp.
    Inventors: Brett Busch, Gowri Damarla, Anurag Jindal, Chia-Yen Ho, Thy Tran
  • Patent number: 8692305
    Abstract: Semiconductor device structures include an at least partially formed container capacitor having a generally cylindrical first conductive member with at least one inner sidewall surface, a lattice material at least partially laterally surrounding an upper end portion of the first conductive member, an anchor material, and at least one aperture extending through the lattice material between the at least partially formed container capacitor and an adjacent at least partially formed container capacitor. Other structures include an at least partially formed container capacitor, a lattice material, and an anchor material disposed over a surface of the lattice material and at least a portion of an end surface of the first conductive member and forming a chemical barrier over at least a portion of an interface between the lattice material and the upper end portion of the first conductive member.
    Type: Grant
    Filed: November 1, 2011
    Date of Patent: April 8, 2014
    Assignee: Micron Technology, Inc.
    Inventors: Brett Busch, Kevin R. Shea, Thomas A. Figura
  • Publication number: 20140054745
    Abstract: Memory cell support lattices and methods of forming the same are described herein. As an example, a method of forming a memory cell support lattice includes forming a mask on a number of capacitor elements in an array, such that a space between vertically and horizontally adjacent capacitor elements is fully covered and a space between diagonally adjacent capacitor elements is partially covered and forming a support lattice in a support material by etching the support material to remove portions of the support material below the openings in the mask.
    Type: Application
    Filed: August 21, 2012
    Publication date: February 27, 2014
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: Zhimin Song, Che-Chi Lee, Brett Busch
  • Publication number: 20140038414
    Abstract: A blanket stop layer is conformally formed on a layer with a large step height. A first chemical mechanical polishing process is performed to remove the blanket stop layer atop the layer in the raised region. A second chemical mechanical polishing process is performed to planarize the wafer using the blanket stop layer as a stop layer when the layer is lower than or at a same level as the blanket stop layer or using the layer as a stop layer when the blanket stop layer is lower than or at a same level as the layer, or a selective dry etch is performed to remove the layer in the raised region. Thus, the layer in the raised region can be easily removed without occurrence of dishing in the non-raised region which is protected by the blanket stop layer.
    Type: Application
    Filed: October 9, 2013
    Publication date: February 6, 2014
    Applicant: NANYA TECHNOLOGY CORP.
    Inventors: BRETT BUSCH, GOWRI DAMARLA, ANURAG JINDAL, Chia-Yen Ho, THY TRAN
  • Patent number: 8580690
    Abstract: A blanket stop layer is conformally formed on a layer with a large step height. A first chemical mechanical polishing process is performed to remove the blanket stop layer atop the layer in the raised region. A second chemical mechanical polishing process is performed to planarize the wafer using the blanket stop layer as a stop layer when the layer is lower than or at a same level as the blanket stop layer or using the layer as a stop layer when the blanket stop layer is lower than or at a same level as the layer, or a selective dry etch is performed to remove the layer in the raised region. Thus, the layer in the raised region can be easily removed without occurrence of dishing in the non-raised region which is protected by the blanket stop layer.
    Type: Grant
    Filed: April 6, 2011
    Date of Patent: November 12, 2013
    Assignee: Nanya Technology Corp.
    Inventors: Brett Busch, Gowri Damarla, Anurag Jindal, Chia-Yen Ho, Thy Tran
  • Patent number: 8524704
    Abstract: Compounds, compositions and methods for modulating the activity of receptors are provided. In particular, compounds and compositions are provided for modulating the activity of receptors and for the treatment, prevention, or amelioration of one or more symptoms of disease or disorder directly or indirectly related to the activity of the receptors.
    Type: Grant
    Filed: August 4, 2009
    Date of Patent: September 3, 2013
    Assignee: Exelixis, Inc.
    Inventors: Brett Busch, Brenton T. Flatt, Xiao-Hui Gu, Richard Martin, Raju Mohan, Tie-Lin Wang, Jason H. Wu
  • Patent number: 8318578
    Abstract: A method of forming a capacitor includes providing material having an opening therein over a node location on a substrate. A shield is provided within and across the opening, with a void being received within the opening above the shield and a void being received within the opening below the shield. The shield comprises a nitride. Etching is conducted within the opening through the nitride-comprising shield. After the etching, a first capacitor electrode is formed within the opening in electrical connection with the node location. A capacitor dielectric and a second capacitor electrode are formed operatively adjacent the first capacitor electrode. Other aspects and implementations are contemplated.
    Type: Grant
    Filed: October 7, 2009
    Date of Patent: November 27, 2012
    Assignee: Micron Technology, Inc.
    Inventors: Kevin Shea, Brett Busch, Farrell Good, Irina Vasilyeva, Vishwanath Bhat
  • Publication number: 20120258596
    Abstract: A blanket stop layer is conformally formed on a layer with a large step height. A first chemical mechanical polishing process is performed to remove the blanket stop layer atop the layer in the raised region. A second chemical mechanical polishing process is performed to planarize the wafer using the blanket stop layer as a stop layer when the layer is lower than or at a same level as the blanket stop layer or using the layer as a stop layer when the blanket stop layer is lower than or at a same level as the layer, or a selective dry etch is performed to remove the layer in the raised region. Thus, the layer in the raised region can be easily removed without occurrence of dishing in the non-raised region which is protected by the blanket stop layer.
    Type: Application
    Filed: April 6, 2011
    Publication date: October 11, 2012
    Inventors: BRETT BUSCH, GOWRI DAMARLA, ANURAG JINDAL, CHIA-YEN HO, THY TRAN
  • Publication number: 20120043596
    Abstract: Semiconductor device structures include an at least partially formed container capacitor having a generally cylindrical first conductive member with at least one inner sidewall surface, a lattice material at least partially laterally surrounding an upper end portion of the first conductive member, an anchor material, and at least one aperture extending through the lattice material between the at least partially formed container capacitor and an adjacent at least partially formed container capacitor. Other structures include an at least partially formed container capacitor, a lattice material, and an anchor material disposed over a surface of the lattice material and at least a portion of an end surface of the first conductive member and forming a chemical barrier over at least a portion of an interface between the lattice material and the upper end portion of the first conductive member.
    Type: Application
    Filed: November 1, 2011
    Publication date: February 23, 2012
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: Brett Busch, Kevin R. Shea, Thomas A. Figura
  • Patent number: 8058126
    Abstract: Methods of forming semiconductor devices that include one or more container capacitors include anchoring an end of a conductive member to a surrounding lattice material using an anchor material, which may be a dielectric. The anchor material may extend over at least a portion of an end surface of the conductive member, at least a portion of the lattice material, and an interface between the conductive member and the lattice material. In some embodiments, the anchor material may be formed without significantly covering an inner sidewall surface of the conductive member. Furthermore, in some embodiments, a barrier material may be provided over at least a portion of the anchor material and over at least a portion of an inner sidewall surface of the conductive member. Novel semiconductor devices and structures are fabricated using such methods.
    Type: Grant
    Filed: February 4, 2009
    Date of Patent: November 15, 2011
    Assignee: Micron Technology, Inc.
    Inventors: Brett Busch, Kevin R. Shea, Thomas A. Figura
  • Publication number: 20100193853
    Abstract: Methods of forming semiconductor devices that include one or more container capacitors include anchoring an end of a conductive member to a surrounding lattice material using an anchor material, which may be a dielectric. The anchor material may extend over at least a portion of an end surface of the conductive member, at least a portion of the lattice material, and an interface between the conductive member and the lattice material. In some embodiments, the anchor material may be formed without significantly covering an inner sidewall surface of the conductive member. Furthermore, in some embodiments, a barrier material may be provided over at least a portion of the anchor material and over at least a portion of an inner sidewall surface of the conductive member. Novel semiconductor devices and structures are fabricated using such methods.
    Type: Application
    Filed: February 4, 2009
    Publication date: August 5, 2010
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: Brett Busch, Kevin R. Shea, Thomas A. Figura
  • Publication number: 20100173824
    Abstract: Compounds, compositions and methods for modulating the activity of receptors are provided. In particular, compounds and compositions are provided for modulating the activity of receptors and for the treatment, prevention, or amelioration of one or more symptoms of disease or disorder directly or indirectly related to the activity of the receptors.
    Type: Application
    Filed: August 4, 2009
    Publication date: July 8, 2010
    Applicant: EXELIXIS, INC.
    Inventors: Brett Busch, Brenton T. Flatt, Xiao-Hui Gu, Richard Martin, Raju Mohan, Tie-Lin Wang, Jason H. Wu
  • Publication number: 20100025362
    Abstract: A method of forming a capacitor includes providing material having an opening therein over a node location on a substrate. A shield is provided within and across the opening, with a void being received within the opening above the shield and a void being received within the opening below the shield. The shield comprises a nitride. Etching is conducted within the opening through the nitride-comprising shield. After the etching, a first capacitor electrode is formed within the opening in electrical connection with the node location. A capacitor dielectric and a second capacitor electrode are formed operatively adjacent the first capacitor electrode. Other aspects and implementations are contemplated.
    Type: Application
    Filed: October 7, 2009
    Publication date: February 4, 2010
    Applicant: Micron Technology, Inc.
    Inventors: Kevin Shea, Brett Busch, Farrell Good, Irina Vasilyeva, Vishwanath Bhat
  • Patent number: 7618874
    Abstract: A method of forming a capacitor includes providing material having an opening therein over a node location on a substrate. A shield is provided within and across the opening, with a void being received within the opening above the shield and a void being received within the opening below the shield. The shield comprises a nitride. Etching is conducted within the opening through the nitride-comprising shield. After the etching, a first capacitor electrode is formed within the opening in electrical connection with the node location. A capacitor dielectric and a second capacitor electrode are formed operatively adjacent the first capacitor electrode. Other aspects and implementations are contemplated.
    Type: Grant
    Filed: May 2, 2008
    Date of Patent: November 17, 2009
    Assignee: Micron Technology, Inc.
    Inventors: Kevin Shea, Brett Busch, Farrell Good, Irina Vasilyeva, Vishwanath Bhat
  • Publication number: 20090275185
    Abstract: A method of forming a capacitor includes providing material having an opening therein over a node location on a substrate. A shield is provided within and across the opening, with a void being received within the opening above the shield and a void being received within the opening below the shield. The shield comprises a nitride. Etching is conducted within the opening through the nitride-comprising shield. After the etching, a first capacitor electrode is formed within the opening in electrical connection with the node location. A capacitor dielectric and a second capacitor electrode are formed operatively adjacent the first capacitor electrode. Other aspects and implementations are contemplated.
    Type: Application
    Filed: May 2, 2008
    Publication date: November 5, 2009
    Inventors: Kevin Shea, Brett Busch, Farrell Good, Irina Vasilyeva, Vishwanath Bhat
  • Patent number: 7595311
    Abstract: Compounds, compositions and methods for modulating the activity of receptors are provided. In particular, compounds and compositions are provided for modulating the activity of receptors and for the treatment, prevention, or amelioration of one or more symptoms of disease or disorder directly or indirectly related to the activity of the receptors.
    Type: Grant
    Filed: December 2, 2003
    Date of Patent: September 29, 2009
    Assignee: Exelixis, Inc.
    Inventors: Brett Busch, Brenton T Flatt, Xiao-Hui Gu, Richard Martin, Raju Mohan, Tie-Lin Wang, Jason H Wu
  • Publication number: 20070105303
    Abstract: A plurality of capacitor electrode openings is formed within capacitor electrode-forming material. A first set of the openings is formed to a depth which is greater within the capacitor electrode-forming material than is a second set of the openings. Conductive first capacitor electrode material is formed therein. A sacrificial retaining structure is formed elevationally over both the first capacitor electrode material and the capacitor electrode-forming material, leaving some of the capacitor electrode-forming material exposed. With the retaining structure in place, at least some of the capacitor electrode-forming material is etched from the substrate effective to expose outer sidewall surfaces of the first capacitor electrode material.
    Type: Application
    Filed: December 26, 2006
    Publication date: May 10, 2007
    Inventors: Brett Busch, Fred Fishburn, James Rominger