Patents by Inventor Brett E. Huff

Brett E. Huff has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240241237
    Abstract: A polarization splitter-rotator (PSR) is described. The PSR having a silicon nitride based waveguide including a first silicon nitride segment comprising a tapered width in a longitudinal direction and a ridge extending in a transverse direction and an adiabatic coupler coupled with the first silicon nitride segment.
    Type: Application
    Filed: March 25, 2024
    Publication date: July 18, 2024
    Inventors: Bing Shen, Kevin Masuda, Brett E. Huff, Pradeep Srinivasan
  • Patent number: 11940572
    Abstract: A polarization splitter-rotator (PSR) is described. The PSR having a silicon nitride based waveguide to split and rotate an optical beam. The silicon nitride based waveguide having a first silicon nitride segment including a first layer and a second layer coupled with the first layer.
    Type: Grant
    Filed: July 12, 2021
    Date of Patent: March 26, 2024
    Assignee: Aeva, Inc.
    Inventors: Bing Shen, Kevin Masuda, Brett E. Huff, Pradeep Srinivasan
  • Patent number: 11788929
    Abstract: A method of testing a photonics die at the wafer level includes providing a sacrificial waveguide and a grating coupler at least partially in a scribe line between dies of a wafer, performing one or more tests on the dies of the wafer via the sacrificial waveguide and grating coupler in the scribe line, and removing the sacrificial waveguide during separation of the dies of the wafer.
    Type: Grant
    Filed: September 29, 2022
    Date of Patent: October 17, 2023
    Assignee: Aeva, Inc.
    Inventors: Brett E. Huff, Pradeep Srinivasan
  • Publication number: 20220196813
    Abstract: A polarization splitter-rotator (PSR) is described. The PSR having a silicon nitride based waveguide to split and rotate an optical beam. The silicon nitride based waveguide having a first silicon nitride segment including a first layer and a second layer coupled with the first layer.
    Type: Application
    Filed: July 12, 2021
    Publication date: June 23, 2022
    Inventors: Bing Shen, Kevin Masuda, Brett E. Huff, Pradeep Srinivasan
  • Patent number: 11061123
    Abstract: A LiDAR system includes an optical source to emit an optical beam and a PSR a silicon nitride based waveguide to split and rotate an optical beam. The silicon nitride based waveguide includes a first silicon nitride segment including a first layer and a second layer, the first silicon nitride segment having tapered widths along a longitudinal direction. The second layer includes a first section extending from a first end of the first silicon nitride segment to a converging plane with increasing widths and a second section extending from the converging plane to a second end of the first silicon nitride segment with decreasing widths. The LIDAR system further includes an optical element to generate a local oscillator (LO) signal and an optical detector to mix the target return signal with the LO signal to generate a heterodyne signal to extract range and velocity information of the target.
    Type: Grant
    Filed: April 2, 2021
    Date of Patent: July 13, 2021
    Assignee: Aeva, Inc.
    Inventors: Bing Shen, Kevin Masuda, Brett E. Huff, Pradeep Srinivasan
  • Patent number: 10983200
    Abstract: A light detection and ranging (LiDAR) system according to the present disclosure comprises an optical source to emit an optical beam. The LiDAR system comprises a PSR comprising a silicon nitride based waveguide to split and rotate a target return signal of the optical beam from a target. The silicon nitride based waveguide includes a first silicon nitride segment and a second silicon nitride segment. The first silicon nitride segment includes a first layer and a second layer. The first silicon nitride segment has tapered widths along a longitudinal direction. The second silicon nitride segment includes a silicon nitride adiabatic coupler. The LiDAR system further comprises an optical element to generate a local oscillator (LO) signal and a PD to mix the target return signal with the LO signal to generate a heterodyne signal to extract information of the target.
    Type: Grant
    Filed: December 21, 2020
    Date of Patent: April 20, 2021
    Assignee: Aeva, Inc.
    Inventors: Bing Shen, Kevin Masuda, Brett E. Huff, Pradeep Srinivasan
  • Patent number: 6771011
    Abstract: Electron emission structures formed using standard semiconductor processes on a substrate first prepared with a topographical feature are disclosed. At least one layer of a first material is concurrently deposited on the substrate and etched from the substrate to form an atomically sharp feature. An at least one layer of a second material is deposited over the atomically sharp feature. A conductive layer is deposited over the at least one layer of the second material. A selected area of material is removed from the conductive layer and the at least one layer of second material to expose the atomically sharp feature. Finally, electrical connectivity is provided to elements of the electron emission structure.
    Type: Grant
    Filed: March 7, 2003
    Date of Patent: August 3, 2004
    Assignee: Intel Corporation
    Inventors: Michael A. Maxim, Oleh Karpenko, Farshid Adibi-rizi, Brett E. Huff
  • Patent number: 6645353
    Abstract: A sputter etch system and a method of conducting a sputter etch. The sputter etch system includes an etch chamber with a wafer pedestal having a top surface to support a wafer and a magnet configured to provide a continuous magnetic field directed at the top surface of the wafer pedestal.
    Type: Grant
    Filed: December 31, 1997
    Date of Patent: November 11, 2003
    Assignee: Intel Corporation
    Inventors: Brett E. Huff, Ken Schatz, Mike Maxim, William G. Petro
  • Publication number: 20030146682
    Abstract: Electron emission structures formed using standard semiconductor processes on a substrate first prepared with a topographical feature are disclosed. At least one layer of a first material is concurrently deposited on the substrate and etched from the substrate to form an atomically sharp feature. An at least one layer of a second material is deposited over the atomically sharp feature. A conductive layer is deposited over the at least one layer of the second material. A selected area of material is removed from the conductive layer and the at least one layer of second material to expose the atomically sharp feature. Finally, electrical connectivity is provided to elements of the electron emission structure.
    Type: Application
    Filed: March 7, 2003
    Publication date: August 7, 2003
    Inventors: Michael A. Maxim, Oleh Karpenko, Farshid Adibi-rizi, Brett E. Huff
  • Publication number: 20030136664
    Abstract: A sputter etch system and a method of conducting a sputter etch. The sputter etch system includes an etch chamber with a wafer pedestal having a top surface to support a wafer and a magnet configured to provide a continuous magnetic field directed at the top surface of the wafer pedestal.
    Type: Application
    Filed: December 31, 1997
    Publication date: July 24, 2003
    Inventors: BRETT E. HUFF, KEN SCHATZ, MIKE MAXIM, WILLIAM G. PETRO
  • Patent number: 6572425
    Abstract: Electron emission structures formed using standard semiconductor processes on a substrate first prepared with a topographical feature are disclosed. At least one layer of a first material is concurrently deposited on the substrate and etched from the substrate to form an atomically sharp feature. An at least one layer of a second material is deposited over the atomically sharp feature. A conductive layer is deposited over the at least one layer of the second material. A selected area of material is removed from the conductive layer and the at least one layer of second material to expose the atomically sharp feature. Finally, electrical connectivity is provided to elements of the electron emission structure.
    Type: Grant
    Filed: March 28, 2001
    Date of Patent: June 3, 2003
    Assignee: Intel Corporation
    Inventors: Michael A. Maxim, Oleh Karpenko, Farshid Adibi-rizi, Brett E. Huff
  • Publication number: 20020140335
    Abstract: Electron emission structures formed using standard semiconductor processes on a substrate first prepared with a topographical feature are disclosed. At least one layer of a first material is concurrently deposited on the substrate and etched from the substrate to form an atomically sharp feature. An at least one layer of a second material is deposited over the atomically sharp feature. A conductive layer is deposited over the at least one layer of the second material. A selected area of material is removed from the conductive layer and the at least one layer of second material to expose the atomically sharp feature. Finally, electrical connectivity is provided to elements of the electron emission structure.
    Type: Application
    Filed: March 28, 2001
    Publication date: October 3, 2002
    Inventors: Michael A. Maxim, Oleh Karpenko, Farshid Adibi-rizi, Brett E. Huff
  • Patent number: 5950107
    Abstract: A method for improving interlayer dielectric to metal layer adhesion including an in-situ plasma treatment process. A metal layer which is formed on a substrate is treated with plasma prior to the deposition of the interlayer dielectric. The interlayer dielectric is deposited above the metal layer and contacts are formed through the interlayer dielectric which electrically connect the underlying metal layer to a subsequently formed metal layer. The plasma treatment step creates open molecular bonds on the surface of the metal layer which cause the interface between the metal layer and the interlayer dielectric to become more adhesive. Thus, decreasing the likelihood of delamination that degrades the electrical reliability of the device.
    Type: Grant
    Filed: December 17, 1996
    Date of Patent: September 7, 1999
    Assignee: Intel Corporation
    Inventors: Brett E. Huff, Farhad K. Moghadom
  • Patent number: 5872064
    Abstract: A method of depositing an inter layer dielectric. A first layer using plasma enhanced chemical vapor deposition (CVD) is deposited. It is followed by a second layer, deposited using sub atmospheric CVD. The second layer is argon sputter etched.
    Type: Grant
    Filed: July 10, 1997
    Date of Patent: February 16, 1999
    Assignee: Intel Corporation
    Inventors: Brett E. Huff, Farhad Moghadam
  • Patent number: 5872401
    Abstract: A method of depositing an inter layer dielectric. A first layer using plasma enhanced chemical vapor deposition (CVD) is deposited. It is followed by a second layer, deposited using sub atmospheric CVD. The second layer is argon sputter etched.
    Type: Grant
    Filed: February 29, 1996
    Date of Patent: February 16, 1999
    Assignee: Intel Corporation
    Inventors: Brett E. Huff, Farhad Moghadam
  • Patent number: 5028490
    Abstract: The present invention provides a discontinuous metal/polymer composite, with a metal layer, formed from a plurality of fine metal strands, which may be used, for example, in static or EMI shielding. The metal layer comprises a plurality of fine metal strands provided on the substrate, the metal strands individually having a cross-section with an area of about 100 to 100,000 .mu.m.sup.2 and the cross-section of the individual metal strands having a flat portion and an arcuate portion. The metal and polymer may be selected so that the composite is capable of being thermoformed without loss of electrical conductivity or transparency.
    Type: Grant
    Filed: November 14, 1988
    Date of Patent: July 2, 1991
    Assignee: Minnesota Mining and Manufacturing Co.
    Inventors: David C. Koskenmaki, Clyde D. Calhoun, Brett E. Huff