Patents by Inventor Brett H. Engel

Brett H. Engel has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10319633
    Abstract: A method of forming a titanium nitride (TiN) diffusion barrier includes exposing a deposition surface to a first pulse of a titanium-containing precursor and to a first pulse of a nitrogen-rich plasma to form a first TiN layer with a first nitrogen concentration making a lower portion of the TiN diffusion barrier, the first nitrogen concentration of the first TiN layer is increased by the first pulse of the nitrogen-rich plasma reducing a reactivity of the lower portion of the TiN diffusion barrier to prevent fluorine diffusion. The first TiN layer is exposed to second pulses of the titanium-containing precursor and the nitrogen-rich plasma to form a second TiN layer with a second nitrogen concentration above the first TiN layer making an upper portion of the TiN diffusion barrier, the first pulse of the nitrogen-rich plasma has a substantially longer duration than the second pulse of the nitrogen-rich plasma.
    Type: Grant
    Filed: May 25, 2016
    Date of Patent: June 11, 2019
    Assignee: International Business Machines Corporation
    Inventors: Brett H. Engel, Domingo A. Ferrer, Arun Vijayakumar, Keith Kwong Hon Wong
  • Patent number: 10170359
    Abstract: A method of forming a titanium nitride (TiN) diffusion barrier includes exposing a deposition surface to a first pulse of a titanium-containing precursor and to a first pulse of a nitrogen-rich plasma to form a first TiN layer with a first nitrogen concentration making a lower portion of the TiN diffusion barrier, the first nitrogen concentration of the first TiN layer is increased by the first pulse of the nitrogen-rich plasma reducing a reactivity of the lower portion of the TiN diffusion barrier to prevent fluorine diffusion. The first TiN layer is exposed to second pulses of the titanium-containing precursor and the nitrogen-rich plasma to form a second TiN layer with a second nitrogen concentration above the first TiN layer making an upper portion of the TiN diffusion barrier, the first pulse of the nitrogen-rich plasma has a substantially longer duration than the second pulse of the nitrogen-rich plasma.
    Type: Grant
    Filed: October 30, 2017
    Date of Patent: January 1, 2019
    Assignee: International Business Machines Corporation
    Inventors: Brett H. Engel, Domingo A. Ferrer, Arun Vijayakumar, Keith Kwong Hon Wong
  • Publication number: 20180374746
    Abstract: A method of forming a titanium nitride (TiN) diffusion barrier includes exposing a deposition surface to a first pulse of a titanium-containing precursor and to a first pulse of a nitrogen-rich plasma to form a first TiN layer with a first nitrogen concentration making a lower portion of the TiN diffusion barrier, the first nitrogen concentration of the first TiN layer is increased by the first pulse of the nitrogen-rich plasma reducing a reactivity of the lower portion of the TiN diffusion barrier to prevent fluorine diffusion. The first TiN layer is exposed to second pulses of the titanium-containing precursor and the nitrogen-rich plasma to form a second TiN layer with a second nitrogen concentration above the first TiN layer making an upper portion of the TiN diffusion barrier, the first pulse of the nitrogen-rich plasma has a substantially longer duration than the second pulse of the nitrogen-rich plasma.
    Type: Application
    Filed: August 31, 2018
    Publication date: December 27, 2018
    Inventors: Brett H. Engel, Domingo A. Ferrer, Arun Vijayakumar, Keith Kwong Hon Wong
  • Publication number: 20180047622
    Abstract: A method of forming a titanium nitride (TiN) diffusion barrier includes exposing a deposition surface to a first pulse of a titanium-containing precursor and to a first pulse of a nitrogen-rich plasma to form a first TiN layer with a first nitrogen concentration making a lower portion of the TiN diffusion barrier, the first nitrogen concentration of the first TiN layer is increased by the first pulse of the nitrogen-rich plasma reducing a reactivity of the lower portion of the TiN diffusion barrier to prevent fluorine diffusion. The first TiN layer is exposed to second pulses of the titanium-containing precursor and the nitrogen-rich plasma to form a second TiN layer with a second nitrogen concentration above the first TiN layer making an upper portion of the TiN diffusion barrier, the first pulse of the nitrogen-rich plasma has a substantially longer duration than the second pulse of the nitrogen-rich plasma.
    Type: Application
    Filed: October 30, 2017
    Publication date: February 15, 2018
    Inventors: Brett H. Engel, Domingo A. Ferrer, Arun Vijayakumar, Keith Kwong Hon Wong
  • Patent number: 9847251
    Abstract: A method of forming a titanium nitride (TiN) diffusion barrier includes exposing a deposition surface to a first pulse of a titanium-containing precursor and to a first pulse of a nitrogen-rich plasma to form a first TiN layer with a first nitrogen concentration making a lower portion of the TiN diffusion barrier, the first nitrogen concentration of the first TiN layer is increased by the first pulse of the nitrogen-rich plasma reducing a reactivity of the lower portion of the TiN diffusion barrier to prevent fluorine diffusion. The first TiN layer is exposed to second pulses of the titanium-containing precursor and the nitrogen-rich plasma to form a second TiN layer with a second nitrogen concentration above the first TiN layer making an upper portion of the TiN diffusion barrier, the first pulse of the nitrogen-rich plasma has a substantially longer duration than the second pulse of the nitrogen-rich plasma.
    Type: Grant
    Filed: May 25, 2016
    Date of Patent: December 19, 2017
    Assignee: International Business Machines Corporation
    Inventors: Brett H. Engel, Domingo A. Ferrer, Arun Vijayakumar, Keith Kwong Hon Wong
  • Publication number: 20170271471
    Abstract: A method includes forming a first silicide on a substrate after patterning a gate and spacer onto the substrate. A film is deposited over the substrate. A portion of the dielectric film is removed to expose the first silicide. A portion of the first silicide is removed to form a punch through region. A liner is deposited in the punch through region. A metal layer is deposited on the liner. The substrate is annealed to form a second silicide on the substrate.
    Type: Application
    Filed: June 6, 2017
    Publication date: September 21, 2017
    Inventors: Nicolas L. Breil, Brett H. Engel, Michael A. Gribelyuk, Ahmet S. Ozcan
  • Publication number: 20170194454
    Abstract: A method includes forming a first silicide on a substrate after patterning a gate and spacer onto the substrate. A film is deposited over the substrate. A portion of the dielectric film is removed to expose the first silicide. A portion of the first silicide is removed to form a punch through region. A liner is deposited in the punch through region. A metal layer is deposited on the liner. The substrate is annealed to form a second silicide on the substrate.
    Type: Application
    Filed: January 6, 2016
    Publication date: July 6, 2017
    Inventors: Nicolas L. Breil, Brett H. Engel, Michael A. Gribelyuk, Ahmet S. Ozcan
  • Publication number: 20160276217
    Abstract: A method of forming a titanium nitride (TiN) diffusion barrier includes exposing a deposition surface to a first pulse of a titanium-containing precursor and to a first pulse of a nitrogen-rich plasma to form a first TiN layer with a first nitrogen concentration making a lower portion of the TiN diffusion barrier, the first nitrogen concentration of the first TiN layer is increased by the first pulse of the nitrogen-rich plasma reducing a reactivity of the lower portion of the TiN diffusion barrier to prevent fluorine diffusion. The first TiN layer is exposed to second pulses of the titanium-containing precursor and the nitrogen-rich plasma to form a second TiN layer with a second nitrogen concentration above the first TiN layer making an upper portion of the TiN diffusion barrier, the first pulse of the nitrogen-rich plasma has a substantially longer duration than the second pulse of the nitrogen-rich plasma.
    Type: Application
    Filed: May 25, 2016
    Publication date: September 22, 2016
    Inventors: Brett H. Engel, Domingo A. Ferrer, Arun Vijayakumar, Keith Kwong Hon Wong
  • Publication number: 20160268161
    Abstract: A method of forming a titanium nitride (TiN) diffusion barrier includes exposing a deposition surface to a first pulse of a titanium-containing precursor and to a first pulse of a nitrogen-rich plasma to form a first TiN layer with a first nitrogen concentration making a lower portion of the TiN diffusion barrier, the first nitrogen concentration of the first TiN layer is increased by the first pulse of the nitrogen-rich plasma reducing a reactivity of the lower portion of the TiN diffusion barrier to prevent fluorine diffusion. The first TiN layer is exposed to second pulses of the titanium-containing precursor and the nitrogen-rich plasma to form a second TiN layer with a second nitrogen concentration above the first TiN layer making an upper portion of the TiN diffusion barrier, the first pulse of the nitrogen-rich plasma has a substantially longer duration than the second pulse of the nitrogen-rich plasma.
    Type: Application
    Filed: May 25, 2016
    Publication date: September 15, 2016
    Inventors: Brett H. Engel, Domingo A. Ferrer, Arun Vijayakumar, Keith Kwong Hon Wong
  • Patent number: 9406554
    Abstract: A method of forming a titanium nitride (TiN) diffusion barrier includes exposing a deposition surface to a first pulse of a titanium-containing precursor and to a first pulse of a nitrogen-rich plasma to form a first TiN layer with a first nitrogen concentration making a lower portion of the TiN diffusion barrier, the first nitrogen concentration of the first TiN layer is increased by the first pulse of the nitrogen-rich plasma reducing a reactivity of the lower portion of the TiN diffusion barrier to prevent fluorine diffusion. The first TiN layer is exposed to second pulses of the titanium-containing precursor and the nitrogen-rich plasma to form a second TiN layer with a second nitrogen concentration above the first TiN layer making an upper portion of the TiN diffusion barrier, the first pulse of the nitrogen-rich plasma has a substantially longer duration than the second pulse of the nitrogen-rich plasma.
    Type: Grant
    Filed: September 30, 2014
    Date of Patent: August 2, 2016
    Assignee: International Business Machines Corporation
    Inventors: Brett H. Engel, Domingo A. Ferrer, Arun Vijayakumar, Keith Kwong Hon Wong
  • Publication number: 20160093526
    Abstract: A method of forming a titanium nitride (TiN) diffusion barrier includes exposing a deposition surface to a first pulse of a titanium-containing precursor and to a first pulse of a nitrogen-rich plasma to form a first TiN layer with a first nitrogen concentration making a lower portion of the TiN diffusion barrier, the first nitrogen concentration of the first TiN layer is increased by the first pulse of the nitrogen-rich plasma reducing a reactivity of the lower portion of the TiN diffusion barrier to prevent fluorine diffusion. The first TiN layer is exposed to second pulses of the titanium-containing precursor and the nitrogen-rich plasma to form a second TiN layer with a second nitrogen concentration above the first TiN layer making an upper portion of the TiN diffusion barrier, the first pulse of the nitrogen-rich plasma has a substantially longer duration than the second pulse of the nitrogen-rich plasma.
    Type: Application
    Filed: September 30, 2014
    Publication date: March 31, 2016
    Inventors: Brett H. Engel, Domingo A. Ferrer, Arun Vijayakumar, Keith Kwong Hon Wong
  • Patent number: 9224675
    Abstract: A method includes forming a first metal liner conformally along a sidewall and a bottom of a contact opening. A second metal liner is formed above and in direct contact with the first metal liner, a grain size of the first metal liner is larger than a grain size of the second metal liner. A barrier layer is formed above and in direct contact with the second metal liner and the contact opening is filled with a conductive material to form a middle-of-the-line contact.
    Type: Grant
    Filed: July 31, 2014
    Date of Patent: December 29, 2015
    Assignee: International Business Machines Corporation
    Inventors: Patrick W. DeHaven, Brett H. Engel, Domingo A. Ferrer, Arun Vijayakumar, Keith Kwong Hon Wong
  • Patent number: 9000564
    Abstract: Use of a replacement metal gate (RMG) process provides an opportunity to create precision polysilicon resistors alongside metal gate transistors. During formation of a sacrificial polysilicon gate, the precision polysilicon resistor can also be formed from the same polysilicon film. The polysilicon resistor can be slightly recessed so that a protective insulating layer can cover the resistor during subsequent replacement of the sacrificial gate with a metal gate. The final structure of the precision polysilicon resistor fabricated using such a process is more compact and less complex than existing structures that provide metal resistors for integrated circuits having metal gate transistors. Furthermore, the precision polysilicon resistor can be freely tuned to have a desired sheet resistance by either implanting the polysilicon film with dopants, adjusting the polysilicon film thickness, or both.
    Type: Grant
    Filed: December 21, 2012
    Date of Patent: April 7, 2015
    Assignees: STMicroelectronics, Inc., International Business Machines Corporation, GlobalFoundries, Inc., Samsung Electronics Co., Ltd.
    Inventors: Pietro Montanini, Gerald Leake, Jr., Brett H. Engel, Roderick Mason Miller, Ju Youn Kim
  • Patent number: 8940634
    Abstract: A method of forming overlapping contacts in a semiconductor device includes forming a first contact in a dielectric layer; etching the dielectric layer to form a recess adjacent to the first contact and removing a top portion of the first contact while etching the dielectric layer, wherein a bottom portion of the first contact remains in the dielectric layer after the recess is formed in the dielectric layer; and forming a second contact in the recess adjacent to the bottom portion of the first contact and on top of a top surface of the bottom portion of the first contact.
    Type: Grant
    Filed: June 29, 2011
    Date of Patent: January 27, 2015
    Assignees: International Business Machines Corporation, GLOBALFOUNDRIES, Inc., STMicroelectronics, Inc.
    Inventors: Brett H. Engel, Lindsey Hall, David F. Hilscher, Randolph F. Knarr, Steven R. Soss, Jin Z. Wallner
  • Publication number: 20140183720
    Abstract: Methods of manufacturing semiconductor integrated circuits having a compressive nitride layer are disclosed. In one example, a method of fabricating an integrated circuit includes depositing an aluminum layer over a semiconductor substrate, depositing a tensile silicon nitride layer or a neutral silicon nitride layer over the aluminum layer, and depositing a compressive silicon nitride layer over the tensile silicon nitride layer or the neutral silicon nitride layer. The compressive silicon nitride layer is deposited at a thickness that is at least about twice a thickness of the tensile silicon nitride layer or the neutral silicon nitride layer. Further, there is no delamination present at an interface between the aluminum layer and the tensile silicon nitride layer or the neutral silicon nitride layer, or at an interface between tensile silicon nitride layer or the neutral silicon nitride layer and the compressive nitride layer.
    Type: Application
    Filed: December 31, 2012
    Publication date: July 3, 2014
    Applicants: INTERNATIONAL BUSINESS MACHINES CORPORATION, GLOBALFOUNDRIES INC.
    Inventors: Scott Beasor, Jay Strane, Man Fai Ng, Brett H. Engel, Chang Yong Xiao, Michael P. Belyansky, Tsung-Liang Chen, Kyung Bum Koo
  • Publication number: 20140175609
    Abstract: Use of a replacement metal gate (RMG) process provides an opportunity to create precision polysilicon resistors alongside metal gate transistors. During formation of a sacrificial polysilicon gate, the precision polysilicon resistor can also be formed from the same polysilicon film. The polysilicon resistor can be slightly recessed so that a protective insulating layer can cover the resistor during subsequent replacement of the sacrificial gate with a metal gate. The final structure of the precision polysilicon resistor fabricated using such a process is more compact and less complex than existing structures that provide metal resistors for integrated circuits having metal gate transistors. Furthermore, the precision polysilicon resistor can be freely tuned to have a desired sheet resistance by either implanting the polysilicon film with dopants, adjusting the polysilicon film thickness, or both.
    Type: Application
    Filed: December 21, 2012
    Publication date: June 26, 2014
    Inventors: Pietro Montanini, Gerald Leake, JR., Brett H. Engel, Roderick Mason Miller, Ju Youn Kim
  • Patent number: 8580628
    Abstract: An integrated circuit having a mis-alignment tolerant electrical contact is formed by providing a semiconductor containing substrate over which is a first FET gate laterally bounded by a first dielectric region, replacing an upper portion of the first FET gate with a second dielectric region, applying a mask having an opening extending partly over an adjacent source or drain contact region of the substrate and over a part of the second dielectric region above the first FET gate, forming an opening through the first dielectric region extending to the contact region and the part of the second dielectric region, and filling the opening with a conductor making electrical connection with the contact region but electrically insulated from the first FET gate by the second dielectric region. A further FET gate may also be provided having an electrical contact thereto formed separately from the source-drain contact.
    Type: Grant
    Filed: February 2, 2012
    Date of Patent: November 12, 2013
    Assignee: GLOBALFOUNDRIES, Inc.
    Inventors: André P. Labonté, Richard S. Wise, Ying Li, Brett H. Engel
  • Publication number: 20130241070
    Abstract: A semiconductor device with overlapping contacts is provided. In one aspect, the semiconductor device includes a dielectric layer; a first contact located in the dielectric layer; and a second contact located in the dielectric layer adjacent to the first contact, wherein a portion of the second contact overlaps a top surface of the first contact.
    Type: Application
    Filed: May 2, 2013
    Publication date: September 19, 2013
    Applicants: International Business Machines Corporation, STMicroelectronics, Inc., Globalfoundaries Inc.
    Inventors: Brett H. Engel, Lindsey Hall, David F. Hilscher, Randolph F. Knarr, Steven R. Soss, Jin Z. Wallner
  • Publication number: 20130200441
    Abstract: An integrated circuit having a mis-alignment tolerant electrical contact is formed by providing a semiconductor containing substrate over which is a first FET gate laterally bounded by a first dielectric region, replacing an upper portion of the first FET gate with a second dielectric region, applying a mask having an opening extending partly over an adjacent source or drain contact region of the substrate and over a part of the second dielectric region above the first FET gate, forming an opening through the first dielectric region extending to the contact region and the part of the second dielectric region, and filling the opening with a conductor making electrical connection with the contact region but electrically insulated from the first FET gate by the second dielectric region. A further FET gate may also be provided having an electrical contact thereto formed separately from the source-drain contact.
    Type: Application
    Filed: February 2, 2012
    Publication date: August 8, 2013
    Applicant: GLOBALFOUNDRIES INC.
    Inventors: André P. Labonté, Richard S. Wise, Ying Li, Brett H. Engel
  • Patent number: 8435891
    Abstract: A method includes providing a semiconductor structure including a plurality of devices; depositing a nitride cap over the semiconductor structure; forming an aluminum mask over the nitride cap, the aluminum mask including a plurality of first openings; converting the aluminum mask to an aluminum oxide etch stop layer; and performing middle-of-line fabrication processing, leaving the aluminum oxide etch stop layer in place. A semiconductor structure includes a plurality of devices on a substrate; a nitride cap over the plurality of devices; an aluminum oxide etch stop layer over the nitride cap; an inter-level dielectric (ILD) over the aluminum oxide etch stop layer; and a plurality of contacts extending through the ILD, the aluminum oxide etch stop layer and the nitride cap to the plurality of devices.
    Type: Grant
    Filed: June 2, 2011
    Date of Patent: May 7, 2013
    Assignee: International Business Machines Corporation
    Inventors: Brett H. Engel, Ying Li, Viraj Y. Sardesai, Richard S. Wise