Abstract: Various embodiments include providing a MTJ-based LUT and adding a system that short circuits or causes dielectric layer breakdown of selected MTJ junctions to permanently finalize a desired logic state configuration of selected MTJs that is read out by the LUT. Additional embodiments disable dielectric layer breakdown or short circuit control circuits to prevent further alterations to MTJ that have not had their dielectric layers broken down or shorted out. A control system then alters reading out the MTJ-based LUT to sense original higher and lower resistance values of un-shorted/altered MTJs as a higher resistance state and a shorted or dielectric layer that has been broken down as a lower resistance state. This combines the flexibility of a multiple-time programmable LUT-based FPGA with the security and reliability of a one-time programmable LUT-based FPGA which has characteristics of a fixed logic non-programmable integrated circuit or application specific integrated circuit (ASIC).

Abstract: Systems and methods for detecting counterfeit integrated circuits are provided. One exemplary embodiment of a method can include: providing an integrated circuit for testing; and characterizing capacitive and inductive loading of the integrated circuit power for a specified frequency range; wherein the characterizing step further comprises applying a low level alternating current to a power pin while measuring for capacitance characterization conditions created by the integrated circuit's internal capacitance and inductance responses, wherein by sweeping the alternating current signal across a specified frequency range one or more capacitance related device signature can be created and used to identify a component as originating from a trusted source or not. A system can include components and machine readable instructions for operating the components using exemplary methods.

Abstract: Various embodiments include providing a MTJ-based LUT and adding a system that short circuits or causes dielectric layer breakdown of selected MTJ junctions to permanently finalize a desired logic state configuration of selected MTJs that is read out by the LUT. Additional embodiments disable dielectric layer breakdown or short circuit control circuits to prevent further alterations to MTJ that have not had their dielectric layers broken down or shorted out. A control system then alters reading out the MTJ-based LUT to sense original higher and lower resistance values of un-shorted/altered MTJs as a higher resistance state and a shorted or dielectric layer that has been broken down as a lower resistance state. This combines the flexibility of a multiple-time programmable LUT-based FPGA with the security and reliability of a one-time programmable LUT-based FPGA which has characteristics of a fixed logic non-programmable integrated circuit or application specific integrated circuit (ASIC).

Abstract: Dual magnification systems and apparatuses for testing and viewing a single objective in a scanning optical microscope and methods of using the systems and apparatuses are provided. Two optical paths allow two wavelengths of light to be magnified to separate magnification levels such that a lower magnification optical path can be used to examine a target area while a higher magnification optical path can be used to examine a subset of the target area and elicit test sample responses to localize a condition of interest.

Abstract: Dual magnification systems and apparatuses for testing and viewing a single objective in a scanning optical microscope and methods of using the systems and apparatuses are provided. Two optical paths allow two wavelengths of light to be magnified to separate magnification levels such that a lower magnification optical path can be used to examine a target area while a higher magnification optical path can be used to examine a subset of the target area and elicit test sample responses to localize a condition of interest.

Abstract: Systems and methods for detecting counterfeit integrated circuits are provided. One exemplary embodiment of a method can include: providing an integrated circuit for testing; and characterizing capacitive and inductive loading of the integrated circuit power for a specified frequency range; wherein the characterizing step further comprises applying a low level alternating current to a power pin while measuring for capacitance characterization conditions created by the integrated circuit's internal capacitance and inductance responses, wherein by sweeping the alternating current signal across a specified frequency range one or more capacitance related device signature can be created and used to identify a component as originating from a trusted source or not. A system can include components and machine readable instructions for operating the components using exemplary methods.

Abstract: Systems and methods for detecting counterfeit integrated circuits are provided. One exemplary embodiment of a method can include: providing an integrated circuit for testing; and characterizing capacitive and inductive loading of the integrated circuit power for a specified frequency range; wherein the characterizing step further comprises applying a low level alternating current to a power pin while measuring for capacitance characterization conditions created by the integrated circuit's internal capacitance and inductance responses, wherein by sweeping the alternating current signal across a specified frequency range one or more capacitance related device signature can be created and used to identify a component as originating from a trusted source or not. A system can include components and machine readable instructions for operating the components using exemplary methods.

Abstract: Dual magnification systems and apparatuses for testing and viewing a single objective in a scanning optical microscope and methods of using the systems and apparatuses are provided. Two optical paths allow two wavelengths of light to be magnified to separate magnification levels such that a lower magnification optical path can be used to examine a target area while a higher magnification optical path can be used to examine a subset of the target area and elicit test sample responses to localize a condition of interest.

Abstract: A test system including an embodiment having a sensor array adapted to test one or more devices under test in learning modes as well as evaluation modes. An exemplary test system can collect a variety of test data as a part of a machine learning system associated with known-good samples. Data collected by the machine learning system can be used to calculate probabilities that devices under test in an evaluation mode meet a condition of interest based on multiple testing and sensor modalities. Learning phases or modes can be switched on before, during, or after evaluation mode sequencing to improve or adjust machine learning system capabilities to determine probabilities associated with different types of conditions of interest. Multiple permutations of probabilities can collectively be used to determine an overall probability of a condition of interest which has a variety of attributes.

Abstract: A test system including an embodiment having a sensor array adapted to test one or more devices under test in learning modes as well as evaluation modes. An exemplary test system can collect a variety of test data as a part of a machine learning system associated with known-good samples. Data collected by the machine learning system can be used to calculate probabilities that devices under test in an evaluation mode meet a condition of interest based on multiple testing and sensor modalities. Learning phases or modes can be switched on before, during, or after evaluation mode sequencing to improve or adjust machine learning system capabilities to determine probabilities associated with different types of conditions of interest. Multiple permutations of probabilities can collectively be used to determine an overall probability of a condition of interest which has a variety of attributes.

Abstract: A test system including an embodiment having a sensor array adapted to test one or more devices under test in learning modes as well as evaluation modes. An exemplary test system can collect a variety of test data as a part of a machine learning system associated with known-good samples. Data collected by the machine learning system can be used to calculate probabilities that devices under test in an evaluation mode meet a condition of interest based on multiple testing and sensor modalities. Learning phases or modes can be switched on before, during, or after evaluation mode sequencing to improve or adjust machine learning system capabilities to determine probabilities associated with different types of conditions of interest. Multiple permutations of probabilities can collectively be used to determine an overall probability of a condition of interest which has a variety of attributes.

Abstract: Systems and methods for detecting counterfeit integrated circuits are provided. One exemplary embodiment of a method can include: providing an integrated circuit for testing; and characterizing capacitive and inductive loading of the integrated circuit power for a specified frequency range; wherein the characterizing step further comprises applying a low level alternating current to a power pin while measuring for capacitance characterization conditions created by the integrated circuit's internal capacitance and inductance responses, wherein by sweeping the alternating current signal across a specified frequency range one or more capacitance related device signature can be created and used to identify a component as originating from a trusted source or not. A system can include components and machine readable instructions for operating the components using exemplary methods.

Abstract: A test system including an embodiment having a sensor array adapted to test one or more devices under test in learning modes as well as evaluation modes. An exemplary test system can collect a variety of test data as a part of a machine learning system associated with known-good samples. Data collected by the machine learning system can be used to calculate probabilities that devices under test in an evaluation mode meet a condition of interest based on multiple testing and sensor modalities. Learning phases or modes can be switched on before, during, or after evaluation mode sequencing to improve or adjust machine learning system capabilities to determine probabilities associated with different types of conditions of interest. Multiple permutations of probabilities can collectively be used to determine an overall probability of a condition of interest which has a variety of attributes.

Abstract: A drift tube amplifier having an input and an output. The drift tube amplifier including a current-to-voltage converter for converting input current to a voltage, a band pass filter assembly for reducing unwanted noise within the voltage, a voltage controlled amplifier for adjusting the output voltage level, and a logarithmic ratio converter for converting the voltage from linear to LOG scale.

Abstract: A magnetically shielded circuit board having a conductive solenoid to repel high speed charged particles away from an integrated circuit chip. The conductive solenoid is embedded in the circuit board, or located around the circuit board, or located within an integrated circuit package, the integrated circuit package have been connected to the circuit board. The conductive solenoid is used for conducting an electrical current, the electrical current forming a magnetic field. The magnetic field will repel high speed charged particles away from the integrated circuit chip, the integrated circuit chip being within the integrated circuit package. The circuit board can be used in a space vehicle.

Abstract: A magnetically shielded circuit board having a conductive solenoid to repel high speed charged particles away from an integrated circuit chip. The conductive solenoid is embedded in the circuit board, or located around the circuit board, or located within an integrated circuit package, the integrated circuit package have been connected to the circuit board. The conductive solenoid is used for conducting an electrical current, the electrical current forming a magnetic field. The magnetic field will repel high speed charged particles away from the integrated circuit chip, the integrated circuit chip being within the integrated circuit package. The circuit board can be used in a space vehicle.