Patents by Inventor Brett J. Thompsen

Brett J. Thompsen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7638995
    Abstract: Methods and apparatus for softstarting a voltage regulation circuit. A circuit for generating an output voltage at an output thereof includes a capacitor having a first terminal configured to be coupled to a reference potential and having a second terminal coupled to the output, and a switchable current source coupled to the capacitor for intermittently charging the capacitor until the output voltage is reached.
    Type: Grant
    Filed: January 18, 2005
    Date of Patent: December 29, 2009
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Brett J. Thompsen, Ira G. Miller, Eduardo Velarde, Jr.
  • Patent number: 7554309
    Abstract: Systems, methods and circuits for regulator minimum load control. In one particular case, a system is provided that includes a load control circuit and a switched load. The load control circuit includes a reference current, and a sense current representative of a load current. In addition, the load control circuit includes a comparator circuit that drives a control signal in response to a comparison between the reference current and the sense current. The switched load is electrically coupled to a load voltage signal to provide loading to the load voltage signal. The switched load is operable to switch between a first loading factor and a second loading factor in response to the control signal.
    Type: Grant
    Filed: May 18, 2005
    Date of Patent: June 30, 2009
    Assignee: Texas Instruments Incorporated
    Inventors: John H. Carpenter, Jr., Brett J. Thompsen, Benjamin L. Amey, Zhihong You, Joseph A. Devore
  • Patent number: 7345529
    Abstract: The chopper stabilized amplifier circuit includes: an amplifier; a first current mirror coupled to an output of the amplifier through a first switch; a second current mirror coupled to the output of the amplifier through a second switch, wherein the first switch is operated out of phase with the second switch; and a summing node for combining currents from the first and second current mirrors.
    Type: Grant
    Filed: June 8, 2005
    Date of Patent: March 18, 2008
    Assignee: Texas Instruments Incorporated
    Inventors: Amer H. Atrash, Brett J. Thompsen
  • Patent number: 7116113
    Abstract: Systems, methods and circuits for sense circuit calibration. In one particular case, a system is provided that includes a sense circuit, a calibration circuit, and a sample and hold circuit. The sense circuit provides a sense current that is derived from either a reference current or a load current depending upon the operational state. The calibration circuit includes a calibration amplifier electrically coupled to the reference current and to the sense current. The calibration amplifier outputs a calibration signal representing a difference between the reference current and the sense current. The sample and hold circuit is operable to store a value representative of the calibration signal, and useful in forming a calibration offset current applied to the sense current.
    Type: Grant
    Filed: May 4, 2005
    Date of Patent: October 3, 2006
    Assignee: Texas Instruments Incorporated
    Inventors: Brett J. Thompsen, John H. Carpenter, Jr., Amer H. Atrash
  • Patent number: 7091712
    Abstract: A circuit (10, 100) is used to perform voltage regulation. In one embodiment, a voltage regulator (11) is used in conjunction with an output transistor (24) to form a circuit (10) which operates to regulate the voltage drop from a first node (30) to a second node (28). This second node (28) may be used to provide power to circuitry (27). The areas of several transistors (20–25) in circuit (10) may be adjusted so that negative and positive temperature coefficients may be balanced such that the circuit (10) behaves as desired over a range of voltages and temperatures. Note that in one embodiment, circuit (10) is a 2-terminal device.
    Type: Grant
    Filed: May 12, 2004
    Date of Patent: August 15, 2006
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Ira G. Miller, Brett J. Thompsen, Eduardo Velarde, Jr.
  • Patent number: 6489914
    Abstract: A RSD analog to digital converter has an RSD stage that in turn has a switched capacitor integrator (SCI). The SCI uses an operational amplifier. A capacitor, which operates as a offset compensation capacitor, is precharged to the offset voltage of the operational amplifier during a precharge phase. The next phase switches this offset compensation capacitor in the path of the capacitors which are used to perform the integration. The effect is that the offset of the operational amplifier is corrected by the use of the compensation capacitor that had been precharged to the offset voltage during the previous phase.
    Type: Grant
    Filed: December 4, 2001
    Date of Patent: December 3, 2002
    Assignee: Motorola, Inc.
    Inventors: Robert S. Jones, III, Brett J. Thompsen