Abstract: A physical layer transceiver for a data channel includes receiver circuitry configured to receive signals on the data channel, transmit circuitry configured to transmit signals onto the data channel, and adaptive filter circuitry coupled to the receiver circuitry and the transmit circuitry and configured to filter the data channel by operating on input frequency-domain data samples to output filtered data samples. The adaptive filter circuitry includes error sample generation circuitry configured to generate error samples representing a difference between a target response and the filtered data samples, arithmetic-only circuitry configured to approximate a windowing function to operate on the error samples, and output sample generation circuitry configured to operate on windowed error samples to provide the output filtered data samples. The comparison circuitry may be configured for time-domain operation and may further be configured to transform the error signals into frequency-domain error signals.

Abstract: A physical layer transceiver for a data channel includes receiver circuitry configured to receive signals on the data channel, transmit circuitry configured to transmit signals onto the data channel, and adaptive filter circuitry coupled to the receiver circuitry and the transmit circuitry and configured to filter the data channel by operating on input frequency-domain data samples to output filtered data samples. The adaptive filter circuitry includes error sample generation circuitry configured to generate error samples representing a difference between a target response and the filtered data samples, arithmetic-only circuitry configured to approximate a windowing function to operate on the error samples, and output sample generation circuitry configured to operate on windowed error samples to provide the output filtered data samples. The comparison circuitry may be configured for time-domain operation and may further be configured to transform the error signals into frequency-domain error signals.

Abstract: The systems and methods for a twisted pair transceiver with correlation detection includes a transceiver system operating on a cable. The transceiver system includes a receiver to obtain one or more data samples related to one or more encoded data symbols. The transceiver system further includes a first correlation filter to generate a first correlation output based on the one or more data samples, and a second correlation filter to generate a second correlation output based on the one or more data samples. The transceiver system further includes a detector. The detector compares the first correlation output with the second correlation output, generates an output data bit based on a comparison result, and sends the output data bit for data decoding.

Abstract: The systems and methods for a twisted pair transceiver with correlation detection includes a transceiver system operating on a cable. The transceiver system includes a receiver to obtain one or more data samples related to one or more encoded data symbols. The transceiver system further includes a first correlation filter to generate a first correlation output based on the one or more data samples, and a second correlation filter to generate a second correlation output based on the one or more data samples. The transceiver system further includes a detector. The detector compares the first correlation output with the second correlation output, generates an output data bit based on a comparison result, and sends the output data bit for data decoding.

Abstract: The systems and methods for a twisted pair transceiver with correlation detection includes a transceiver system operating on a cable. The transceiver system includes a receiver to obtain one or more data samples related to one or more encoded data symbols. The transceiver system further includes a first correlation filter to generate a first correlation output based on the one or more data samples, and a second correlation filter to generate a second correlation output based on the one or more data samples. The transceiver system further includes a detector. The detector compares the first correlation output with the second correlation output, generates an output data bit based on a comparison result, and sends the output data bit for data decoding.

Abstract: An apparatus and method for cable diagnostics is disclosed for deployment as part of an Ethernet communication system to conduct diagnostics. The system transmits one or more pulses which are Ethernet compatible and of finite duration. Reflections are detected and through processing and measurement of the amplitude and round-trip delay of the pulse's reflection, cable faults are located. In one embodiment, this innovation uses an IEEE 802.3 compliant transmit pulse, such as an auto-negotiation signal (AN pulse), to conduct cable diagnostics. The benefits of a standard compliant allow for use with any vendor on the far-end and the signal requires no special hardware or software to produce and, therefore, reduces system complexity and cost. To reduce incorrect measurements, the apparatus measures cable length and termination with multiple AN pulses. It then applies non-linear filters to redundant measurements in such a way that it produces accurate cable diagnostics information.

Abstract: An apparatus and method for cable diagnostics is disclosed for deployment as part of an Ethernet communication system to conduct diagnostics. The system transmits one or more pulses which are Ethernet compatible and of finite duration. Reflections are detected and through processing and measurement of the amplitude and round-trip delay of the pulse's reflection, cable faults are located. In one embodiment, this innovation uses an IEEE 802.3 compliant transmit pulse, such as an auto-negotiation signal (AN pulse), to conduct cable diagnostics. The benefits of a standard compliant allow for use with any vendor on the far-end and the signal requires no special hardware or software to produce and, therefore, reduces system complexity and cost. To reduce incorrect measurements, the apparatus measures cable length and termination with multiple AN pulses. It then applies non-linear filters to redundant measurements in such a way that it produces accurate cable diagnostics information.

Abstract: Disclosed is a UGMII system to interface multirate devices including 10 gigabit per second data exchange rates. Mode selection is enabled to provide for automatic detection and adaptation to any transmit rate including 10M, 100M, 1 G, and 10 G. Mode selection comprises the negotiation between the UGMII extension sublayers located at the MAC and PHY to select between one of several operational modes including: XGMII communication, GMII encapsulation, Clause 22 MDIO register management and Clause 45 MDIO register management. Selection of UGMII and XGMII operating modes are negotiated between the MAC and PHY using ordered sets to announce and acknowledgement a mode change. In one embodiment 802.3 Clause 46 defined ordered sets are utilized.

Abstract: A communication system processes blocks of input data that include control words and a packet of information words are received. The packet has a start preceded by ones of the control words and an end followed by others of the control words. When the block consists exclusively of information words, a one bit block header having a first sense is appended to the block to form a frame. When the block does not consist exclusively of information words, the block is condensed to accommodate a TYPE word, the TYPE word is generated and inserted into the block and a one bit block header is appended to the block to form the frame. When the block does not consist exclusively of information words the one bit block header has a second sense, opposite to the first sense. Use of a one bit block header reduces overhead. Forward error correction is also utilized.

Abstract: A circuit for inserting a parity signal into a data stream, including a precoder circuit to precode the data stream to be written on a medium by generating a precoded data stream; a parity circuit to generate a parity signal based on said data stream at a predetermined time; and an insertion circuit to insert said parity signal into said precoded data stream.

Abstract: A circuit for inserting a parity signal into a data stream, including a precoder circuit to precode the data stream to be written on a medium by generating a precoded data stream; a parity circuit to generate a parity signal based on said data stream at a predetermined time; and an insertion circuit to insert said parity signal into said precoded data stream.