Abstract: Computer computation of correctly rounded floating point summation is described. An example of apparatus includes a first circuit to sort multiple floating point (FP) values based on an exponent of each FP value and store the sorted FP values in a buffer, and to provide the plurality of FP values for summation sequentially in a sorted order starting with a FP value having a smallest exponent; a second circuit to iteratively sum the FP values and store an accumulated value, generate and store a residual value representing fully resolved bits from the accumulator, and generate an intermediate output including the residual value; and a third circuit to perform final rounding of the output, the final rounded output being a correctly rounded summation of the maximum floating point values.

Abstract: Computer computation of exact floating point addition is described. An example of an apparatus includes a first circuit to add first and second floating point inputs, including sorting the inputs to identify a larger input and a smaller input, adding bits in an upper portion of the smaller input to bits of the larger input, generating a high intermediate value based on the sum, and a generating a low intermediate value based on a lower portion of the lower input; and a second circuit to generate first and second outputs based on the high and low intermediate values, wherein the first output plus the second output exactly equals the first input plus the second input.