Patents by Inventor Brett W. Attaway

Brett W. Attaway has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Fast bist architecture with flexible standard interface
    Patent number: 5872793
    Abstract: A built-in self test architecture for testing one or more integrated circuits. Each circuit is provided with an interface compatible with IEEE standard 1149.1 and one or more scan registers containing scan cells for supplying input test data to, and receiving output test data from, the internal circuitry of the integrated circuits, a pseudo-random pattern generator for supplying patterns of test data to the boundary scan register, and a pattern compressor for compressing the output test data into a signature. The architecture also includes a single clock multiplexer, located external to the integrated circuits, for selectively supplying a system clock or a test clock to the testing components of each integrated circuit.
    Type: Grant
    Filed: August 21, 1997
    Date of Patent: February 16, 1999
    Assignee: Lockheed Martin Corporation
    Inventors: Brett W. Attaway, John D. Lofgren, H. Ray Kelley
  • Fast bist architecture with flexible standard interface
    Patent number: 5701308
    Abstract: A built-in self test architecture for testing one or more integrated circuits. Each circuit is provided with an interface compatible with IEEE standard 1149.1 and one or more scan registers containing scan cells for supplying input test data to, and receiving output test data from, the internal circuitry of the integrated circuits, a pseudo-random pattern generator for supplying patterns of test data to the boundary scan register, and a pattern compressor for compressing the output test data into a signature. The architecture also includes a single clock multiplexer, located external to the integrated circuits, for selectively supplying a system clock or a test clock to the testing components of each integrated circuit.
    Type: Grant
    Filed: October 29, 1996
    Date of Patent: December 23, 1997
    Assignee: Lockheed Martin Corporation
    Inventors: Brett W. Attaway, John D. Lofgren, H. Ray Kelley