Abstract: A prosthetic heart valve holder system includes a prosthetic heart valve having a base at an inflow end, a plurality of commissure posts extending from the base toward an outflow end, and valve leaflets secured to the commissure posts to permit flow through the heart valve. A deflector is provided at the outflow end having a central hub and a plurality of arms extending from the central hub secured to and covering the tips of respective commissure posts. A valve support body is secured to the base and a post connects the valve support body to the hub of the deflector.

Abstract: Various illustrative aspects are directed to a data storage device comprising a first spindle motor configured to rotate one or more disks in a first stack of disks, a second spindle motor configured to rotate one or more disks in a second stack of disks, and one or more processing devices configured to detect back electromotive force (BEMF) voltages generated by the first spindle motor and the second spindle motor. In other aspects the one or more processing devices can control speeds of the first spindle motor and the second spindle motor based on the detected BEMF voltages.

Abstract: Images depicting items in a waste flow on a conveyor belt are provided to two analysis systems. The first system processes images to decode digital watermark payload data found on certain of the items (e.g., plastic containers). This payload data is used to look up corresponding attribute metadata for the items in a database, such as the type of plastic in each item, and whether the item was used as a food container or not. The second analysis system can be a spectroscopy system that determines the type of plastic in each item by its absorption characteristics. When the two systems conflict in identifying the plastic type, a sorting logic processor applies a rule set to arbitrate the conflict and determine which plastic type is most likely. The item is then sorted into one of several different bins depending on a combination of the final plastic identification, and whether the item was used as a food container or not. A variety of other features and arrangements are also detailed.

Abstract: Methods, systems, and devices for multi-purpose signaling for a memory system are described. One or more signal paths of between a host device and a memory device may be configured to support shared pathways between multiple channels and to support multiple functions. For example, a signal path may be configured to communicate a state signal for an initialization sequence of the memory device, an error signal for the memory device to indicate that errors have occurred, or a low-power signal for the host device to request that the memory device enter a low-power mode, or a combination thereof. The signal path may be shared between two or more channels of the memory device.

Abstract: Various illustrative aspects are directed to a data storage device comprising a disk and a spindle motor configured to rotate the disk wherein the spindle motor is powered by a drive voltage generated in response to a host voltage. The data storage device includes a head configured to be actuated over the disk by a head actuator and control circuitry comprising an isolation field effect transistor (ISOFET) configured to prevent a reverse current from flowing from the drive voltage to the host voltage when the host voltage falls below a threshold. The control circuitry sets a turnoff current level at which the ISOFET is directed to turn off to prevent the reverse current from flowing determines a drain-source on resistance Rdson of the ISOFET, and calculates a voltage turnoff threshold at which the ISOFET is turned off from the turnoff current level and the determined Rdson.

Abstract: An electronic gaming machine includes a display device and a game controller configured to initiate a feature game that uses a plurality of mechanical reels and the display device, identify a number of feature game symbols initially available for use during the feature game, display a plurality of symbol columns, each symbol column of the plurality of symbol columns is associated with a reel, perform a spin of the reels, in response to the player initiating the play, distribute the number of feature game symbols into the plurality of symbol columns based on an output of a random number generator, each feature game symbol being displayed in a determined symbol column of the plurality of symbol columns, evaluate an outcome of the feature game based on attributing the feature game symbols to associated reels, and award credit to the player based on the evaluating.

Abstract: A data storage device comprises a lead actuator that actuates a first read-write head over a first disk and a support actuator that actuates a second read-write head over a second disk. A spindle motor rotates the first and second disks. In response to an emergency power off (EPO) event, a processing device retracts and parks the actuators using an internal supply voltage generated from a back electromotive force (BEMF) voltage of the spindle motor, and egresses data from a volatile to a non-volatile semiconductor memory. Egress is throttled before the actuators are retracted and parked when the internal supply voltage falls to or below a first egress throttling threshold voltage. Egress is throttled after the actuators are retracted and parked when the internal supply voltage falls to or below a second egress throttling threshold voltage.

Abstract: Methods, systems, and devices for clock locking for frame-based communications of memory devices are described. A memory system may include a memory device and a host device. The memory device may receive one or more frames of data from the host device, the one or more frames of data communicated by the host device using a first frame clock. The memory device may generate a second frame clock aligned with the one or more frames on receiving the one or more frames and align one or more operations of the memory device with the second frame clock. In some examples, the host device may receive a second set of frames from the memory device based on transmitting the first set of frames. The host device may align one or more operations of the host device with the second set of frames received from the memory device.

Abstract: Various illustrative aspects are directed to a data storage device comprising one or more disks, an actuator arm assembly comprising one or more disk heads and a voice coil motor (VCM), the VCM configured to operate in a PWM mode and a linear mode, and one or more processing devices configured to: seek the VCM towards a target track in the PWM mode; transition the VCM from the PWM mode to the linear mode, wherein the transitioning comprises switching an offset compensation value from a first offset compensation value to a second compensation offset value to compensate for a transition offset induced while transitioning the VCM from the PWM to the linear mode, wherein the first and the second offset compensation values correspond to the PWM and linear modes, respectively, and seek the VCM towards the target track in the linear mode for a linear mode time.

Abstract: A data storage device comprises a lead actuator that actuates a first read-write head over a first disk and a support actuator that actuates a second read-write head over a second disk. A spindle motor rotates the first and second disks. In response to an emergency power off (EPO) event, a processing device retracts and parks the actuators using an internal supply voltage generated from a back electromotive force (BEMF) voltage of the spindle motor, and brakes the spindle motor. The spindle motor is not braked until both the lead and support actuators have been retracted and parked.

Abstract: Various illustrative aspects are directed to a data storage device comprising a first spindle motor configured to rotate one or more disks in a first stack of disks, a second spindle motor configured to rotate one or more disks in a second stack of disks, and one or more processing devices configured to detect back electromotive force (BEMF) voltages generated by the first spindle motor and the second spindle motor. In other aspects the one or more processing devices can control speeds of the first spindle motor and the second spindle motor based on the detected BEMF voltages.

Abstract: Various illustrative aspects are directed to a data storage device comprising a disk and a spindle motor configured to rotate the disk wherein the spindle motor is powered by a drive voltage generated in response to a host voltage. The data storage device includes a head configured to be actuated over the disk by a head actuator and control circuitry comprising an isolation field effect transistor (ISOFET) configured to prevent a reverse current from flowing from the drive voltage to the host voltage when the host voltage falls below a threshold. The control circuitry sets a turnoff current level at which the ISOFET is directed to turn off to prevent the reverse current from flowing determines a drain-source on resistance Rdson of the ISOFET, and calculates a voltage turnoff threshold at which the ISOFET is turned off from the turnoff current level and the determined Rdson.

Abstract: Computer system security is often implemented using rules-based systems (e.g., allow traffic to this network port, deny it for those network ports; user A is allowed access to these files, but not those files). In enterprises, multiple such systems may be deployed, but fail to be able to intelligently handle anomalies that may technically be permissible but in reality represents a high possibility that there is an underlying threat or problem. The present disclosure describes the ability to build adaptive models using machine learning techniques that integrate data from multiple different domains (e.g. user identity domain, system device domain) and allow for automated decision making and mitigation actions that can provide greater effectiveness than previous systems allowed.

Abstract: Methods, systems, and devices for latency offset for frame-based communications are described. A memory system may include a host device and a memory device that communicate using frames based on a frame period of a frame clock. The memory device may receive a read command and a write command from the host device, and determine a read latency and a write latency corresponding to the received commands. The memory device may also determine an additional offset latency to add to the write latency to avoid bus contention between read data and write data associated with the read command and the write command, respectively. The offset latency may correspond to an integer quantity of clock periods, which may be less than the frame period.

Abstract: A data storage device comprises a lead actuator that actuates a first read-write head over a first disk and a support actuator that actuates a second read-write head over a second disk. A spindle motor rotates the first and second disks. In response to an emergency power off (EPO) event, a processing device retracts and parks the actuators using an internal supply voltage generated from a back electromotive force (BEMF) voltage of the spindle motor, and egresses data from a volatile to a non-volatile semiconductor memory. Egress is throttled before the actuators are retracted and parked when the internal supply voltage falls to or below a first egress throttling threshold voltage. Egress is throttled after the actuators are retracted and parked when the internal supply voltage falls to or below a second egress throttling threshold voltage.

Abstract: Methods and systems for generating a computer-implemented interactive graphical user interface for facilitating finding appropriate antibody products utilizing visual evaluation of sequence information are disclosed. An antibody product listing within the graphical user interface is generated. The antibody product listing is responsive to a user interaction. The antibody product listing includes at least one antibody product including corresponding sequence information and product specifications. A sequence infographic is generated based on the corresponding sequence information, wherein the sequence infographic includes an amino acid sequence area of interest indicator. The sequence infographic is displayed aligned relative to a plurality of sequence infographics.

Abstract: A data storage device comprises a lead actuator that actuates a first read-write head over a first disk and a support actuator that actuates a second read-write head over a second disk. A spindle motor rotates the first and second disks. In response to an emergency power off (EPO) event, a processing device retracts and parks the actuators using an internal supply voltage generated from a back electromotive force (BEMF) voltage of the spindle motor, and brakes the spindle motor. The spindle motor is not braked until both the lead and support actuators have been retracted and parked.

Abstract: A data storage device comprises a lead actuator that actuates a first read-write head over a first disk and a support actuator that actuates a second read-write head over a second disk. A spindle motor rotates the first and second disks. In response to an emergency power off (EPO) event, a processing device retracts and parks the actuators using an internal supply voltage generated from a back electromotive force (BEMF) voltage of the spindle motor, and brakes the spindle motor. The spindle motor is not braked until both the lead and support actuators have been retracted and parked.

Abstract: Various illustrative aspects are directed to a data storage device comprising one or more disks, an actuator arm assembly comprising one or more disk heads and a voice coil motor (VCM), the VCM configured to operate in a PWM mode and a linear mode, and one or more processing devices configured to: seek the VCM towards a target track in the PWM mode; transition the VCM from the PWM mode to the linear mode, wherein the transitioning comprises switching an offset compensation value from a first offset compensation value to a second compensation offset value to compensate for a transition offset induced while transitioning the VCM from the PWM to the linear mode, wherein the first and the second offset compensation values correspond to the PWM and linear modes, respectively, and seek the VCM towards the target track in the linear mode for a linear mode time.

Abstract: A gaming machine, such as a video slot or video poker machine, may be configured to execute an interface. The gaming machine may be configured to receive, a plurality of times, player input to play a first wagering game on the gaming machine. The gaming machine may be further configured to generate, each time the player input is received, game results for the first wagering game. The gaming machine may also be configured to generate game results for a second wagering game. The gaming machine may also be configured to present an animation of the wagering agent engaging in wagering activities.