Patents by Inventor Brian A. Kuns

Brian A. Kuns has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Ultra low voltage, low leakage, high density, variation tolerant memory bit cells
    Patent number: 7656702
    Abstract: Methods and apparatus to provide ultra low voltage, low leakage, high density, and/or variation tolerant memory bit cells are described. In one embodiment, each of the cross-coupled invertors of a memory cell may include a plurality of p-channel transistors. Other embodiments are also described.
    Type: Grant
    Filed: December 31, 2007
    Date of Patent: February 2, 2010
    Assignee: Intel Corporation
    Inventors: Sapumal Wijeratne, Matthew W. Ernest, Brian A. Kuns
  • Ultra low voltage, low leakage, high density, variation tolerant memory bit cells
    Publication number: 20090168509
    Abstract: Methods and apparatus to provide ultra low voltage, low leakage, high density, and/or variation tolerant memory bit cells are described. In one embodiment, each of the cross-coupled invertors of a memory cell may include a plurality of p-channel transistors. Other embodiments are also described.
    Type: Application
    Filed: December 31, 2007
    Publication date: July 2, 2009
    Inventors: Sapumal Wijeratne, Matthew W. Ernest, Brian A. Kuns