Patents by Inventor Brian A. Moane

Brian A. Moane has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Overvoltage protection device and method
    Patent number: 9484739
    Abstract: A protection device is provided that exhibits a turn on time of order of one nanosecond or less. Such a device provides enhanced protection for integrated circuits against electrostatic discharge events. This in turn reduces the risk of device failure in use. The protection device can include a bipolar transistor structure connected between a node to be protected and a discharge path.
    Type: Grant
    Filed: September 25, 2014
    Date of Patent: November 1, 2016
    Assignee: ANALOG DEVICES GLOBAL
    Inventors: Edward John Coyne, John Twomey, Seamus P. Whiston, David J. Clarke, Donal P. McAuliffe, William Allan Lane, Stephen Denis Heffernan, Brian A. Moane, Brian Michael Sweeney, Patrick Martin McGuinness
  • OVERVOLTAGE PROTECTION DEVICE AND METHOD
    Publication number: 20160094026
    Abstract: A protection device is provided that exhibits a turn on time of order of one nanosecond or less. Such a device provides enhanced protection for integrated circuits against electrostatic discharge events. This in turn reduces the risk of device failure in use. The protection device can include a bipolar transistor structure connected between a node to be protected and a discharge path.
    Type: Application
    Filed: September 25, 2014
    Publication date: March 31, 2016
    Inventors: Edward John Coyne, John Twomey, Seamus P. Whiston, David J. Clarke, Donal P. McAuliffe, William Allan Lane, Stephen Denis Heffernan, Brian A. Moane, Brian Michael Sweeney, Patrick Martin McGuinness
  • SCR cell for electrical overstress protection of electronic circuits
    Patent number: 6236087
    Abstract: An input protection device is provided for protecting a circuit structure which is coupled to a first node, the device comprising a first lightly-doped region of P-type material with a lightly doped well of N-type material formed in it. Two regions of heavily doped N-type and P-type material, which are electrically connected to the first node, are formed in the well of N-type material. A third heavily doped region of N type material is formed in the first lightly-doped region of P-type material and is electrically connected to a reference node. In a first aspect of this invention, the third heavily doped region of N type material is formed in a second well of N-type material, which in turn is formed in the first lightly-doped region of P-type material. In this first aspect of the invention a further region of heavily doped P-type material is formed in the second well of N-type material, this further region of heavily doped P-type material being electrically connected to the reference node.
    Type: Grant
    Filed: November 2, 1998
    Date of Patent: May 22, 2001
    Assignee: Analog Devices, Inc.
    Inventors: Michael P. Daly, Denis Ellis, Keith A. Moloney, Liam J. White, Brian A. Moane, Kieran Heffernan, Denis Joseph Doyle, Michael G. Tuthill, David John Clarke