Patents by Inventor Brian A. Vaartstra

Brian A. Vaartstra has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20050221006
    Abstract: A method of forming (and an apparatus for forming) a metal-doped aluminum oxide layer on a substrate, particularly a semiconductor substrate or substrate assembly, using a vapor deposition process.
    Type: Application
    Filed: May 17, 2005
    Publication date: October 6, 2005
    Applicant: MICRON TECHNOLOGY, INC.
    Inventor: Brian Vaartstra
  • Publication number: 20050160981
    Abstract: A method of forming (and apparatus for forming) a zirconium and/or hafnium-containing layer on a substrate, particularly a semiconductor substrate or substrate assembly, using a vapor deposition process and one or more silicon precursor compounds of the formula Si(OR)4 with one or more zirconium and/or hafnium precursor compounds of the formula M(NR?R?)4, wherein R, R?, and R? are each independently an organic group and M is zirconium or hafnium.
    Type: Application
    Filed: August 28, 2002
    Publication date: July 28, 2005
    Applicant: MICRON TECHNOLOGY, INC.
    Inventor: Brian Vaartstra
  • Publication number: 20050148182
    Abstract: A planarization method includes providing a metal-containing surface (preferably, a Group VIII metal-containing surface, and more preferably a platinum-containing surface) and positioning it for contact with a polishing surface in the presence of a planarization composition that includes a halogen and a halide salt.
    Type: Application
    Filed: February 15, 2005
    Publication date: July 7, 2005
    Applicant: MICRON TECHNOLOGY, INC.
    Inventor: Brian Vaartstra
  • Publication number: 20050136689
    Abstract: A method of forming (and an apparatus for forming) a metal oxide layer on a substrate, particularly a semiconductor substrate or substrate assembly, using a vapor deposition process, one or more alcohols, and one or more metal-containing precursor compounds.
    Type: Application
    Filed: August 28, 2002
    Publication date: June 23, 2005
    Applicant: MICRON TECHNOLOGY, INC.
    Inventor: Brian Vaartstra
  • Publication number: 20050124171
    Abstract: This invention includes methods of forming a phosphorus doped silicon dioxide comprising layers, and methods of forming trench isolation in the fabrication of integrated circuitry. In one implementation, a method of forming a phosphorus doped silicon dioxide comprising layer includes positioning a substrate within a deposition chamber. First and second vapor phase reactants are introduced in alternate and temporally separated pulses to the substrate within the chamber in a plurality of deposition cycles under conditions effective to deposit a phosphorus doped silicon dioxide comprising layer on the substrate. One of the first and second vapor phase reactants is PO(OR)3 where R is hydrocarbyl, and an other of the first and second vapor phase reactants is Si(OR)3OH where R is hydrocarbyl.
    Type: Application
    Filed: January 7, 2005
    Publication date: June 9, 2005
    Inventor: Brian Vaartstra
  • Publication number: 20050112298
    Abstract: The present invention describes thick film photolithographic molds, methods of making thick film photolithographic molds, and methods of using thick film photolithographic molds to form spacers on a substrate. The thick film photolithographic molds preferably comprise an epoxy bisphenol A novolac resin. The present invention also describes sol gel spacers comprising sodium silicates and potassium silicates. The thick film photolithographic molds and sol gel spacers of the present invention can be used in flat panel displays, such as field emission displays and plasma displays.
    Type: Application
    Filed: November 1, 2004
    Publication date: May 26, 2005
    Applicant: Micron Technology, Inc.
    Inventors: James Hofmann, Brian Vaartstra, Brenda Kraus, Donald Westmoreland
  • Patent number: 6872420
    Abstract: The present invention provides methods for the preparation of compounds of the formula (Formula I): LyM(CO)z wherein M is Ru or Os, each L is independently a neutral ligand, y=1-4, and z=1-5. These methods involve the reaction of Ru3(CO)12 or Os3(CO)12 with a neutral ligand in a solvent system having a boiling point higher than that of benzene at atmospheric pressure.
    Type: Grant
    Filed: April 21, 2003
    Date of Patent: March 29, 2005
    Assignee: Micron Technology, Inc.
    Inventors: Stefan Uhlenbrock, Brian A. Vaartstra
  • Publication number: 20050056550
    Abstract: A method and apparatus for removing conductive material from a microelectronic substrate is disclosed. One method includes disposing an electrolytic liquid between a conductive material of a substrate and at least one electrode, with the electrolytic liquid having about 80% water or less. The substrate can be contacted with a polishing pad material, and the conductive material can be electrically coupled to a source of varying electrical signals via the electrolytic liquid and the electrode. The method can further include applying a varying electrical signal to the conductive material, moving at least one of the polishing pad material and the substrate relative to the other, and removing at least a portion of the conductive material while the electrolytic liquid is adjacent to the conductive material. By limiting/controlling the amount of water in the electrolytic liquid, an embodiment of the method can remove the conductive material with a reduced downforce.
    Type: Application
    Filed: August 20, 2004
    Publication date: March 17, 2005
    Inventors: Whonchee Lee, Scott Moore, Brian Vaartstra
  • Publication number: 20050059324
    Abstract: A method and apparatus for removing conductive material from a microelectronic substrate is disclosed. One method includes disposing an electrolytic liquid between a conductive material of a substrate and at least one electrode, with the electrolytic liquid having about 80% water or less. The substrate can be contacted with a polishing pad material, and the conductive material can be electrically coupled to a source of varying electrical signals via the electrolytic liquid and the electrode. The method can further include applying a varying electrical signal to the conductive material, moving at least one of the polishing pad material and the substrate relative to the other, and removing at least a portion of the conductive material while the electrolytic liquid is adjacent to the conductive material. By limiting/controlling the amount of water in the electrolytic liquid, an embodiment of the method can remove the conductive material with a reduced downforce.
    Type: Application
    Filed: September 17, 2003
    Publication date: March 17, 2005
    Inventors: Whonchee Lee, Scott Moore, Brian Vaartstra
  • Patent number: 6863725
    Abstract: In one aspect, a substrate is positioned within a deposition chamber. Gaseous precursors comprising TaF5 and at least one of H2O and O3 are fed to the deposition chamber under conditions effective to deposit a Ta2O5 comprising layer on the substrate. In one implementation, a substrate is positioned within a deposition chamber. A first species is chemisorbed onto the substrate within the chamber to form a first species monolayer from a gaseous first precursor comprising TaF5. The chemisorbed first species is contacted with a gaseous second precursor comprising at least one of H2O and O3 to react with the first species to form a monolayer comprising Ta and O. The chemisorbing and contacting are successively repeated under conditions effective to form a mass of material on the substrate comprising Ta2O5.
    Type: Grant
    Filed: February 4, 2003
    Date of Patent: March 8, 2005
    Assignee: Micron Technology, Inc.
    Inventors: Brian A. Vaartstra, Trung Tri Doan
  • Patent number: 6861353
    Abstract: A planarization method includes providing a metal-containing surface (preferably, a Group VIII metal-containing surface, and more preferably a platinum-containing surface) and positioning it for contact with a polishing surface in the presence of a planarization composition that includes a halogen and a halide salt.
    Type: Grant
    Filed: February 3, 2004
    Date of Patent: March 1, 2005
    Assignee: Micron Technology, Inc.
    Inventor: Brian A. Vaartstra
  • Publication number: 20050032360
    Abstract: A method of forming (and apparatus for forming) refractory metal nitride layers (including silicon nitride layers), such as a tantalum (silicon) nitride barrier layer, on a substrate by using a vapor deposition process with a refractory metal precursor compound, a disilazane, and an optional silicon precursor compound.
    Type: Application
    Filed: August 30, 2004
    Publication date: February 10, 2005
    Applicant: MICRON TECHNOLOGY, INC.
    Inventor: Brian Vaartstra
  • Publication number: 20050028733
    Abstract: A method of forming (and apparatus for forming) refractory metal nitride layers (including silicon nitride layers), such as a tantalum (silicon) nitride barrier layer, on a substrate by using a vapor deposition process with a refractory metal precursor compound, a disilazane, and an optional silicon precursor compound.
    Type: Application
    Filed: August 30, 2004
    Publication date: February 10, 2005
    Applicant: MICRON TECHNOLOGY, INC.
    Inventor: Brian Vaartstra
  • Publication number: 20050022738
    Abstract: Methods of forming a layer on a substrate using complexes of Formula I. The complexes and methods are particularly suitable for the preparation of semiconductor structures. The complexes are of the formula LyMYz (Formula I) wherein: M is a metal; each L group is independently a neutral ligand containing one or more Lewis-base donor atoms; each Y group is independently an anionic ligand; y=a nonzero integer; and z=a nonzero integer corresponding to the valence state of the metal.
    Type: Application
    Filed: September 1, 2004
    Publication date: February 3, 2005
    Applicant: MICRON TECHNOLOGY, INC.
    Inventor: Brian Vaartstra
  • Publication number: 20050019978
    Abstract: A method of forming (and apparatus for forming) a tantalum oxide layer on a substrate, particularly a semiconductor substrate or substrate assembly, using a vapor deposition process and a tantalum precursor compound that includes alkoxide ligands, for example.
    Type: Application
    Filed: August 23, 2004
    Publication date: January 27, 2005
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: Brian Vaartstra, Timothy Quick
  • Publication number: 20050009368
    Abstract: This invention includes methods of forming a phosphorus doped silicon dioxide comprising layers, and methods of forming trench isolation in the fabrication of integrated circuitry. In one implementation, a method of forming a phosphorus doped silicon dioxide comprising layer includes positioning a substrate within a deposition chamber. First and second vapor phase reactants are introduced in alternate and temporally separated pulses to the substrate within the chamber in a plurality of deposition cycles under conditions effective to deposit a phosphorus doped silicon dioxide comprising layer on the substrate. One of the first and second vapor phase reactants is PO(OR)3 where R is hydrocarbyl, and an other of the first and second vapor phase reactants is Si(OR)3OH where R is hydrocarbyl.
    Type: Application
    Filed: July 7, 2003
    Publication date: January 13, 2005
    Inventor: Brian Vaartstra
  • Publication number: 20050009266
    Abstract: A method of forming (and apparatus for forming) refractory metal oxide layers, such as tantalum pentoxide layers, on substrates by using vapor deposition processes with refractory metal precursor compounds and ethers.
    Type: Application
    Filed: August 4, 2004
    Publication date: January 13, 2005
    Applicant: MICRON TECHNOLOGY, INC.
    Inventor: Brian Vaartstra
  • Patent number: 6828256
    Abstract: A method of forming a film on a substrate using one or more complexes containing one or more chelating O- and/or N-donor ligands. The complexes and methods are particularly suitable for the preparation of semiconductor structures using chemical vapor deposition techniques and systems.
    Type: Grant
    Filed: January 13, 2004
    Date of Patent: December 7, 2004
    Assignee: Micron Technology, Inc.
    Inventor: Brian A. Vaartstra
  • Patent number: 6821341
    Abstract: A vaporizing apparatus and method for providing a vaporized liquid precursor to a process chamber in a vapor deposition process includes a microdroplet forming device for generating microdroplets from a liquid precursor and a heated housing defining a vaporization zone having a vapor flow path from the microdroplet forming device to the process chamber. The vaporization zone receives the microdroplets and a heated carrier gas. The heated carrier gas has a temperature so as to provide the primary source of heat for vaporizing the microdroplets. The vaporized liquid precursor is then directed to the process chamber from the heated vaporization zone.
    Type: Grant
    Filed: July 18, 2001
    Date of Patent: November 23, 2004
    Assignee: Micron Technology, Inc.
    Inventor: Brian A. Vaartstra
  • Publication number: 20040219746
    Abstract: A method of forming (and apparatus for forming) a metal oxide layer, preferably a dielectric layer, on a substrate, particularly a semiconductor substrate or substrate assembly, using a vapor deposition process and ozone with one or more metal organo-amine precursor compounds.
    Type: Application
    Filed: April 29, 2003
    Publication date: November 4, 2004
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: Brian A. Vaartstra, Timothy A. Quick