Abstract: A probe card assembly can include a plurality of probes disposed on a substrate and arranged to contact terminals of a semiconductor wafer. Switches can be disposed on the probe card assembly and provide for selective connection and disconnection of the probes from electrical interconnections on the probe card assembly.

Abstract: A technique for distributing power to a plurality of dies uses a probe card. The probe card can include a plurality of regulators, each regulator accepting a bulk power input and producing a regulated output. The regulated output can be controlled by a programmable controller that accepts a tester-controlled power input and adjusts the regulated outputs as a function of the tester-controlled power input.

Abstract: A technique for distributing power to a plurality of dies uses a probe card. The probe card can include a plurality of regulators, each regulator accepting a bulk power input and producing a regulated output. The regulated output can be controlled by a programmable controller that accepts a tester-controlled power input and adjusts the regulated outputs as a function of the tester-controlled power input.

Abstract: An integrated circuit (IC) tester for testing an IC device under test (DUT) includes a set of scaleable channels and a pattern generator for supplying control data to each scaleable channel prior to each test cycle. Under software control, each scaleable channel can implement one or more tester channels by allocating its timing and other resources among the channels it implements. Each channel includes a timing signal generator for generating a set of timing signals, each having an edge occurring at a separate time during each test cycle controlled by the control data. Each scaleable channel also includes a DUT interface circuit for carrying out test activities at one or more DUT input/output (IO) pins, where a test activity may be either producing a state change in a test signal input to a DUT IO pin or sampling DUT output signals appearing a DUT IO pin to determine whether it is of an expected state.

Abstract: A bio-semiconductor integrated circuit including at least one sensor that generates an electrical signal in the presence of a material. The signal is processed in detection circuitry. A sensor simulator is in communication with the detection circuitry and/or sensor. Using the sensor simulator, test signals may be transmitted to the detection circuitry and/or sensor for testing of the bio-semiconductor integrated circuit.