Abstract: Object-code instruction traces are employed to analyze selected instructions of a year-2000 (Y2K) remediated application program for possible remediation failure when confronted by a year-2000 date. The analysis includes directly identifying one or more instructions of the remediated application program that may fail. A remediation-failure-pattern descriptor is assigned to each examined instruction which is indicative of whether the remediated instruction may fail when confronted by a date in the year-2000 range. The analysis employs user-specifiable run-control values, as well as predetermined filter-specification values in comparing traces of each selected object-code instruction to predefined remediation-failure patterns.

Abstract: A computer architecture that provides the definition of a 20 bit signed displacement value used to form the operand storage address.

Abstract: A method and apparatus for runtime remediation of object-code instructions (such as date instructions that are not year 2000 compliant) in a computer program. Before runtime, a setup function of a program monitor locates each instruction to be remediated in a load module of a user program and overlays the instruction with a trap instruction. The address of the overlaid instruction is stored in a scan slot of a window control table (WCT). The text of the overlaid instruction is stored in a corresponding operand slot of the WCT along with control information including a set of flags and windowing and cycling parameters. At runtime, upon decoding a trap instruction, the CPU transfers control to an instruction simulation function of the program monitor, which searches the scan slots of the WCT for the one containing the address of the overlaid instruction.

Abstract: A central processing unit of an information handling system is provided with a Trap instruction to facilitate transfer of control from a user program to a trap program. A dispatchable unit control block (DUCT) of the CPU is loaded with the address of a trap control block, which in turn contains the addresses of a trap save area and a trap program. The user program is provided with Trap instructions at the desired transfer points. Upon decoding a Trap instruction in the user program, the CPU saves state information from the program status word (PSW), general registers and access registers in the designated trap save area, loads the address of the trap control block into a general register, and copies the address of the trap program into the instruction address field of the PSW to transfer control to the trap program. Upon completion of execution, the trap program may issue a Resume Program (RP) instruction to restore the previously saved state information to return control to the user program.

Abstract: Object-code instruction traces are employed to analyze selected instructions of an application program for possible failure when confronted by a year-2000 date. The analysis includes directly identifying one or more instructions of the application program that may fail, as well as identifying whether the one or more instructions have a characteristic of a predefined false-positive failure pattern. A failure-pattern descriptor is assigned to each examined instruction which is indicative of whether the instruction may fail when confronted by a date in the year-2000 range, and whether the instruction is a possible false-positive failing instruction. The analysis employs user-specifiable run-control values, as well as predetermined filter-specification values in comparing traces of each selected object-code instruction to predefined instruction failure patterns.

Abstract: Object-code instruction traces are employed to analyze selected instructions of an application program for possible failure when confronted by a year-2000 date. The analysis includes directly identifying one or more instructions of the application program that may fail, as well as identifying whether the one or more instructions have a characteristic of a predefined false-positive failure pattern. A failure-pattern descriptor is assigned to each examined instruction which is indicative of whether the instruction may fail when confronted by a date in the year-2000 range, and whether the instruction is a possible false-positive failing instruction. The analysis employs user-specifiable run-control values, as well as predetermined filter-specification values in comparing traces of each selected object-code instruction to predefined instruction failure patterns.

Abstract: Object-code instruction traces are employed to analyze selected instructions of an application program for possible failure when confronted by a year-2000 date. The analysis includes directly identifying one or more instructions of the application program that may fail, as well as identifying whether the one or more instructions have a characteristic of a predefined false-positive failure pattern. A failure-pattern descriptor is assigned to each examined instruction which is indicative of whether the instruction may fail when confronted by a date in the year-2000 range, and whether the instruction is a possible false-positive failing instruction. The analysis employs user-specifiable run-control values, as well as predetermined filter-specification values in comparing traces of each selected object-code instruction to predefined instruction failure patterns.

Abstract: A mechanism for communicating messages, each including a command and a response, in a network having central processing complexes (CPCs) and one or more coupling facilities. Each coupling facility has a central processor for executing instructions and a main storage. Messages are sent from a message control block in the main storage of the CPC sending the message, and the response to the message is received in a message response block of the CPC without an interrupt to the program being executed by the central processor of the CPC. Each message from a CPC to the coupling facility may include a command and an indicator bit which instructs the coupling facility to execute the command either in synchronism with or asynchronously to the execution of the sending processor. The coupling facility executes the command and returns a response which is received in a message response block of the main storage of the sending CPC without an interrupt to any program being executed by the central processor of that CPC.

Abstract: A message path mechanism in a network having central processing complexes (CPCs) joined by message paths to a coupling facility. The coupling facility locates message paths for sending messages from one CPC to another and for sending messages between the coupling facility and one or more of the CPCs. A message path status table is provided having an entry for each of the message paths. Each entry has an indicator indicating whether its message path is active or inactive. multiple connections between the coupling facility and systems in the CPCs are registered in the coupling facility. Also provided is a mechanism for validating that each message path is connected properly such that if a message path is disconnected and then reconnected to a CPC, the validation mechanism insures that the message path has been reconnected correctly.

Abstract: Storage is managed in a shared electronic store (SES) by assigning storage classes (STCs) to each directory entry having a data item stored in SES. The assignments of directory entries and data elements to the respective STCs can be changed at any time by any CPC. Eventually, no free space remains in the SES cache, and then space for new directory entries and data items must be obtained by reclaiming space occupied by directory entries and associated unchanged data items. The reclaiming of SES space is controlled on a STC basis. Any specified STC may reclaim from itself or from another STC using reclaiming software/microcode in SES, which includes a reclaim vector, a reclaim counter, a queue, and reclaiming controls. The vector and counter have respective elements for all possible STCs to controls how a specified STC may reclaim space from any or all target STC. Any enabled target STC reclaims its space according to an LRU algorithm maintained by a queue for the STC.

Abstract: In a multi-system complex having central processing complexes (CPCs) and subsystems, a hardware facility for prompt interdicting I/O and message operations. A CPC or subsystem failure causes as interruption in the availability of the data bases to the attached network of terminals. Often such networks have thousands of terminals. Even a short loss of data is detrimental. Therefore the CPC or subsystem takeover must be accomplished as quickly as possible and the I/O attached to the failing CPC or subsystem must be interdicting to release it for use to the rest of the complex. The disclosed hardware facility provides a mechanism which is program initiated and controlled and which guarantees the prompt completion of the interdiction function.

Abstract: A shared coupling facility contains system lock management (SLM) means for supporting a distributed locking protocol used by a plurality of sharing lock managers each executing on a processor having access to the shared memory and to any other processors in the processor complex. A request to lock a resource shared among the lock managers is first checked against a local hash table and then, if necessary, forwarded to the system lock management means in the shared memory for synchronous or asynchronous processing. List structures are maintained in the shared coupling facility to support the protocol, and are used by the system lock management means to record data recovery status. The sharing lock managers interact with the SLM means to control/manage lock contention, waiter queueing, and compatibility processing.

Abstract: A Structured External Storage (SES) device/processor is connected to two or more DP systems, thereby loosely coupling the systems. The SES is capable of holding data objects of two distinct types (List objects and Cache objects), and communicates commands and command responses with the systems using a message protocol. A support facility within a processor on which a system is executing receives status indications from the SES without interrupting mainline system execution. Within the SES, a serialization mechanism allows more than one command to execute in parallel without loss of data object integrity, or command consistency. A forward completion mechanism sends to systems early notification of completion of certain commands, without permitting results inconsistent with this notification to be obtained by the systems. And a restart mechanism permits interrupted commands to be restarted by the initiating system or, in certain cases, by another system.

Abstract: In a communications system in which voice is transmitted as packets of digitized samples, a receiving station delays the output of the first packet in a way that compensates for wide variations in the intervals at which successive packets are received. According to one feature of this system, a first packet is transmitted at a higher priority so that a greater delay can be used without encounter problems that arise from the uncertainty in the delay in transmitting this packet. In another feature of this system, the arrival time of the first few packets of a conversation are detected and the delay is readjusted in case the first packet has been unusually delayed.

Abstract: Secondary storage subsystems exchange messages and data with host data processing systems and also forward messages between host systems. Host systems thereby communicate with each other in addition to having access to data in subsystem storage. Access to subsystem storage is initiated by a "request" sent from a host to the subsystem. Each request is a message containing an array of one or more commands, each command specifying a transfer of data or a control function to be performed by the subsystem. A subsystem may process more than one request at a time. It also may process the commands in a request in an arbitrary sequence suited to the availability of subsystem resources and data links to host systems. After all commands in a request have been processed the subsystem transmits an associated "completion" message to the host system which originated the request. The completion message indicates the status of completion or abnormal termination of each command in the associated request.

Abstract: This is a system which is used to perform reconfiguration of storage elements in order to permit removal of one or more of the elements for servicing or other reasons. If a storage element that is to be taken off line contains material that is crucial to the continued operation of the system, that material is copied to appropriate areas in other storage elements. After all crucial material has been copied to alternate locations, the original storage element can be taken off line for servicing or other purposes.