Patents by Inventor Brian Beatty

Brian Beatty has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11646206
    Abstract: Described are methods for forming a multilayer conductive structure for semiconductor devices. A seed layer is formed comprising a metal and an additional constituent that in combination with the metal inhibits nucleation of a fill layer of the metal formed over the seed layer. Tungsten may be doped or alloyed with silicon to form the seed layer, with a tungsten fill being formed over the seed layer.
    Type: Grant
    Filed: November 23, 2020
    Date of Patent: May 9, 2023
    Assignee: Micron Technology, Inc.
    Inventors: David Ross Economy, Brian Beatty, John Mark Meldrim, Yongjun Jeff Hu, Jordan D. Greenlee
  • Publication number: 20210183651
    Abstract: Described are methods for forming a multilayer conductive structure for semiconductor devices. A seed layer is formed comprising a metal and an additional constituent that in combination with the metal inhibits nucleation of a fill layer of the metal formed over the seed layer. Tungsten may be doped or alloyed with silicon to form the seed layer, with a tungsten fill being formed over the seed layer.
    Type: Application
    Filed: November 23, 2020
    Publication date: June 17, 2021
    Inventors: David Ross Economy, Brian Beatty, John Mark Meldrim, Yongjun Jeff Hu, Jordan D. Greenlee
  • Patent number: 10847367
    Abstract: Described are methods for forming a multilayer conductive structure for semiconductor devices. A seed layer is formed comprising a metal and an additional constituent that in combination with the metal inhibits nucleation of a fill layer of the metal formed over the seed layer. Tungsten may be doped or alloyed with silicon to form the seed layer, with a tungsten fill being formed over the seed layer.
    Type: Grant
    Filed: December 28, 2018
    Date of Patent: November 24, 2020
    Assignee: Micron Technology, Inc.
    Inventors: David R. Economy, Brian Beatty, John Mark Meldrim, Yongjun Jeff Hu, Jordan D. Greenlee
  • Publication number: 20200211843
    Abstract: Described are methods for forming a multilayer conductive structure for semiconductor devices. A seed layer is formed comprising a metal and an additional constituent that in combination with the metal inhibits nucleation of a fill layer of the metal formed over the seed layer. Tungsten may be doped or alloyed with silicon to form the seed layer, with a tungsten fill being formed over the seed layer.
    Type: Application
    Filed: December 28, 2018
    Publication date: July 2, 2020
    Inventors: David Ross Economy, Brian Beatty, John Mark Meldrim, Yongjun Jeff Hu, Jordan D. Greenlee