Abstract: The invention relates to methods of treating a patient suffering from an IL-33-mediated disorder, such as asthma, comprising administering to the patient an IL-33 axis binding antagonist based on the genotype of the IL1RL1 gene. The invention further relates to methods of determining whether a patient is at increased risk of an IL-33-mediated disorder, as well as methods of determining whether a patient suffering from such a disorder is likely to respond to a treatment comprising an IL-33 axis binding antagonist, based on the genotype of the IL1RL1 gene.

Abstract: Dynamic translation of indirect branch instructions of a target application by a host processor is enhanced by including a cache to provide access to the addresses of the most frequently used translations of a host computer, minimizing the need to access the translation buffer. Entries in the cache have a host instruction address and tags that may include a logical address of the instruction of the target application, the physical address of that instruction, the code segment limit to the instruction, and the context value of the host processor associated with that instruction. The cache may be a software cache apportioned by software from the main processor memory or a hardware cache separate from main memory.

Abstract: Dynamic translation of indirect branch instructions of a target application by a host processor is enhanced by including a cache to provide access to the addresses of the most frequently used translations of a host computer, minimizing the need to access the translation buffer. Entries in the cache have a host instruction address and tags that may include a logical address of the instruction of the target application, the physical address of that instruction, the code segment limit to the instruction, and the context value of the host processor associated with that instruction. The cache may be a software cache apportioned by software from the main processor memory or a hardware cache separate from main memory.

Abstract: Dynamic translation of indirect branch instructions of a target application by a host processor is enhanced by including a cache to provide access to the addresses of the most frequently used translations of a host computer, minimizing the need to access the translation buffer. Each entry in the cache includes a host instruction address, a logical address of the instruction of the target application, the physical address of that instruction, the code segment limit to the instruction, and the context value of the host processor associated with that instruction, the last four named components constituting tags to the host instruction address, and a valid-invalid bit. In a basic embodiment, the cache is a software cache apportioned by software from the main processor memory chips.