Patents by Inventor Brian Clebowicz
Brian Clebowicz has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20220214951Abstract: Fault injection testing for field programmable gate array (FPGA) devices including: interfacing with a FPGA device under test (DUT); imaging a configuration RAM (CRAM) of the FPGA DUT with a first configuration image to define a first operational function of the FPGA DUT where the CRAM includes a plurality of CRAM bits, injecting a plurality of single event upsets into a portion of the plurality of the CRAM bits while the FPGA DUT is operating; concurrently monitoring operations of the FPGA DUT and a reference FPGA device; comparing outputs of the FPGA DUT with outputs of the reference FPGA device during concurrent operations, and if there is a mismatch between the outputs of the FPGA DUT and the reference FPGA, determining that error events have occurred within the FPGA DUT; and storing the error events and CRAM location data associated with corresponding single event upsets in an error log.Type: ApplicationFiled: January 5, 2021Publication date: July 7, 2022Applicant: Raytheon CompanyInventors: Patrick Fleming, Mustafa Amin, James Bynes, III, Patrick Llorens, Dale D. Kachuche, Brian Clebowicz, William Rowe, Alfredo Lara, Neal Pollack
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Patent number: 11378622Abstract: Fault injection testing for field programmable gate array (FPGA) devices including: interfacing with a FPGA device under test (DUT); imaging a configuration RAM (CRAM) of the FPGA DUT with a first configuration image to define a first operational function of the FPGA DUT where the CRAM includes a plurality of CRAM bits, injecting a plurality of single event upsets into a portion of the plurality of the CRAM bits while the FPGA DUT is operating; concurrently monitoring operations of the FPGA DUT and a reference FPGA device; comparing outputs of the FPGA DUT with outputs of the reference FPGA device during concurrent operations, and if there is a mismatch between the outputs of the FPGA DUT and the reference FPGA, determining that error events have occurred within the FPGA DUT; and storing the error events and CRAM location data associated with corresponding single event upsets in an error log.Type: GrantFiled: January 5, 2021Date of Patent: July 5, 2022Assignee: Raytheon CompanyInventors: Patrick Fleming, Mustafa Amin, James Bynes, III, Patrick Llorens, Dale D. Kachuche, Brian Clebowicz, William Rowe, Alfredo Lara, Neal Pollack
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Patent number: 9337918Abstract: A digital payload for processing a sub-band spectrum received on an uplink beam at a communications satellite includes a digital channelizer, a digital switch matrix and a digital combiner. The digital channelizer divides the sub-band spectrum into a plurality of frequency slices that can be routed by the digital switch matrix to any of a number of receiving ports. A digital combiner receives the frequency slices and re-assembles them to form one or more output sub-bands for transmission on an output beam of the communications satellite. The digital payload may also include an embeddable digital regeneration module configured to demodulate some or all of the sub-band spectrum to extract a digital bitstream therefrom. The digital bitstream may be processed to implement code-based multiplexing, switching, access control, and other features.Type: GrantFiled: April 17, 2014Date of Patent: May 10, 2016Assignee: The Boeing CompanyInventors: Douglas T. Bell, Brian A. Clebowicz
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Publication number: 20140226555Abstract: A digital payload for processing a sub-band spectrum received on an uplink beam at a communications satellite includes a digital channelizer, a digital switch matrix and a digital combiner. The digital channelizer divides the sub-band spectrum into a plurality of frequency slices that can be routed by the digital switch matrix to any of a number of receiving ports. A digital combiner receives the frequency slices and re-assembles them to form one or more output sub-bands for transmission on an output beam of the communications satellite. The digital payload may also include an embeddable digital regeneration module configured to demodulate some or all of the sub-band spectrum to extract a digital bitstream therefrom. The digital bitstream may be processed to implement code-based multiplexing, switching, access control, and other features.Type: ApplicationFiled: April 17, 2014Publication date: August 14, 2014Applicant: The Boeing CompanyInventors: Douglas T. Bell, Brian A. Clebowicz
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Patent number: 8320829Abstract: A system and method for enabling on-demand inter-spacecraft resource sharing and coordination are disclosed involving at least one wireless device and a payload. At least one wireless device transmits and receives communications to at least one access point and at least one user. In one or more embodiments, spacecrafts are employed for the access points and/or the users. The payload comprises at least one transponder and at least one processor. At least one transponder transmits and receives the communications to at least one access point and at least one user. The processor provides channelized communication and regenerative communication to at least one user. Also, the processor monitors signal quality of the communications received from at least one user. In one or more embodiments, the wireless device is a radio frequency (RF) omni-directional antenna. In some embodiments, the wireless device is a diffuse optical emitter and receiver.Type: GrantFiled: June 22, 2009Date of Patent: November 27, 2012Assignee: The Boeing CompanyInventors: Brian A. Clebowicz, Jeff Nocket
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Patent number: 8064920Abstract: A digital payload for processing a sub-band spectrum received on an uplink beam at a communications satellite includes a digital channelizer, a digital switch matrix and a digital combiner. The digital channelizer divides the sub-band spectrum into a plurality of frequency slices that can be routed by the digital switch matrix to any of a number of receiving ports. A digital combiner receives the frequency slices and re-assembles them to form one or more output sub-bands for transmission on an output beam of the communications satellite. The digital payload may also include an embeddable digital regeneration module configured to demodulate some or all of the sub-band spectrum to extract a digital bitstream therefrom. The digital bitstream may be processed to implement code-based multiplexing, switching, access control, and other features.Type: GrantFiled: March 9, 2009Date of Patent: November 22, 2011Assignee: The Boeing CompanyInventors: Douglas T. Bell, Brian A. Clebowicz
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Publication number: 20090247179Abstract: A digital payload for processing a sub-band spectrum received on an uplink beam at a communications satellite includes a digital channelizer, a digital switch matrix and a digital combiner. The digital channelizer divides the sub-band spectrum into a plurality of frequency slices that can be routed by the digital switch matrix to any of a number of receiving ports. A digital combiner receives the frequency slices and re-assembles them to form one or more output sub-bands for transmission on an output beam of the communications satellite. The digital payload may also include an embeddable digital regeneration module configured to demodulate some or all of the sub-band spectrum to extract a digital bitstream therefrom. The digital bitstream may be processed to implement code-based multiplexing, switching, access control, and other features.Type: ApplicationFiled: March 9, 2009Publication date: October 1, 2009Inventors: Douglas T. Bell, Brian A. Clebowicz
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Patent number: 7542716Abstract: A digital payload for processing a sub-band spectrum received on an uplink beam at a communications satellite includes a digital channelizer, a digital switch matrix and a digital combiner. The digital channelizer divides the sub-band spectrum into a plurality of frequency slices that can be routed by the digital switch matrix to any of a number of receiving ports. A digital combiner receives the frequency slices and re-assembles them to form one or more output sub-bands for transmission on an output beam of the communications satellite. The digital payload may also include an embeddable digital regeneration module configured to demodulate some or all of the sub-band spectrum to extract a digital bitstream therefrom. The digital bitstream may be processed to implement code-based multiplexing, switching, access control, and other features.Type: GrantFiled: January 28, 2004Date of Patent: June 2, 2009Assignee: The Boeing CompanyInventors: Douglas T. Bell, Brian A. Clebowicz
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Publication number: 20040185775Abstract: A digital payload for processing a sub-band spectrum received on an uplink beam at a communications satellite includes a digital channelizer, a digital switch matrix and a digital combiner. The digital channelizer divides the sub-band spectrum into a plurality of frequency slices that can be routed by the digital switch matrix to any of a number of receiving ports. A digital combiner receives the frequency slices and re-assembles them to form one or more output sub-bands for transmission on an output beam of the communications satellite. The digital payload may also include an embeddable digital regeneration module configured to demodulate some or all of the sub-band spectrum to extract a digital bitstream therefrom. The digital bitstream may be processed to implement code-based multiplexing, switching, access control, and other features.Type: ApplicationFiled: January 28, 2004Publication date: September 23, 2004Inventors: Douglas T. Bell, Brian A. Clebowicz
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Patent number: 5282196Abstract: A data router for receiving input data, having a timing characteristic, and transmitting output data that is either bursted or non-bursted. The non-bursted data comprises frames of data with each frame comprising slots of data, each slot having a position and a number. The invention (200) provides translation between bursted and non-bursted formats and includes an input buffer circuit (104) for receiving input data from an input channel and storing the input data as the input data is received from the input channel. An output buffer circuit (210) is included for formatting the stored input data, translating between bursted and non-bursted data formats and outputting the formatted and translated data to an output channel. A sequencer (105) routing controller circuit controls the operation of the input buffer circuit (104) and output buffer circuit (210).Type: GrantFiled: October 15, 1991Date of Patent: January 25, 1994Assignee: Hughes Aircraft CompanyInventor: Brian A. Clebowicz
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Patent number: 5091940Abstract: An improved data router 10 with burst deshuffling and shuffling output buffers that performs input data deshuffling and output data formatting and shuffling using only one burst buffer per input channel 16 and one frame buffer per output channel 26. The router 10 includes input channels 16 for receiving input bursts, input burst buffers 14 for storing the input bursts, output frame buffers 23 for storing the input bursts in a deshuffled order and providing formatted and shuffled output bursts, output channels 26 for transmitting the output bursts and a router controller 20 for controlling the operation of the router. Due to the advantageous design of the data router 10 of the present invention, the input bursts and output bursts may be of different sizes and have different transmission data rates.Type: GrantFiled: January 16, 1990Date of Patent: February 25, 1992Assignee: Hughes Aircraft CompanyInventor: Brian A. Clebowicz