Abstract: A constant edge-rate ternary output consecutive-edge modulator (CEM) method and apparatus provides improved dynamic range in a noise-shaped CEM ternary pulse generator. A noise shaper shapes an input signal that is supplied to a pair of CEMs through a mismatch shaper or other code splitter that assigns unequal pulse width portions (the extra count in odd counts) between the pair of CEMs. The range of pulse width out of the CEMs can then be allowed to extend to the full sample period for one or possibly both of the CEMs in a given cycle. A control circuit overrides the mismatch shaper's assignment of the unequal pulse width portions when a previous pulse period yielded no transition from a given CEM, so that the given CEM is guaranteed to have a transition in the current pulse period.

Abstract: A method and apparatus for reducing noise in a digital-to-analog converter (DAC) having a chopper amplifier output stage provides improved DAC performance. A switched-current output provided from a digital filter is coupled to the input of a chopper amplifier. The current switches are non-uniform, so that extra zeros are provided at the chopping frequency of the chopping amplifier, thereby reducing noise that would otherwise be aliased in-band at the output of the chopper amplifier. The current switches may include a first set of half-magnitude switches followed by a set of full-magnitude switches and finally by another set of half-magnitude switches having a size equal to that of the first set.

Abstract: A centered-pulse consecutive edge modulation (CEM) method and apparatus provides a pulse output that advantageously exploits the full edge update rate of the CEM while providing substantially centered pulses. The method and apparatus also operate without substantial delay in the input control path. The apparatus includes a delta-sigma noise shaping modulator followed by a CEM that receives an output of the delta-sigma modulator quantizer. A non-linear correction signal is applied with polarity alternating at each edge and is applied to the quantizer input or is designed into the quantizer transfer function. The non-linear correction signal compensates for the noise-shaping modulator output such that the expected rising edge and falling edge widths of the CEM output pulses are substantially equal with respect to a DC input to the delta-sigma modulator.

Abstract: A method of performing digital to analog conversion includes generating a pulse width modulated data stream and another pulse width modulated data stream, encoding patterns of the pulse width modulated data stream selected to minimize distortion in the another pulse width modulated stream caused by edges in the pulse width modulated data stream. The pulse width modulated data stream and the another pulse width modulated data stream are converted into an analog signal and another analog signal converting in corresponding digital to analog conversion elements and the analog signal and the another analog signal are summed to generate an analog output signal.

Abstract: Methods and apparatus are provided for receiving DSD data in phase modulation mode using a single clock signal. Either the bit clock or phase signal may be used.

Abstract: A method of operating a delta-sigma modulator by providing a variable-level quantizer, which selectively enables an additional quantizer level(s) during a ramp up sequence of the modulator. The additional quantizer level(s) is/are disabled during normal operation. The quantizer truncates a summer output and selectively enables the additional quantizer levels by clipping the truncated sum within a first range of quantizer levels during the ramp up sequence and within a second range of quantizer levels during normal operation in which there are more quantizer levels in the first range than in the second range. The quantizer preferably enables at least two additional quantizer levels at a low end of the quantizer range. For example, the range of quantizer levels for normal operation of the modulator can be from ?6 to +6, while the range of quantizer levels for ramp up operation of the modulator can be from ?8 to +7.

Abstract: A pulse width modulator includes at least one input for receiving an input signal and pulse width modulation circuitry for generating a pulse width modulated stream and another pulse width modulated stream. The pulse width modulated stream and the another pulse width modulated stream are nominally out of phase and together represent the received input signal. A summer sums the pulse width modulated stream and the another pulse width modulated stream to generate an analog output signal.

Abstract: Methods and apparatus are provided for receiving DSD data in phase modulation mode using a single clock signal. Either the bit clock or phase signal may be used.