Patents by Inventor Brian Dolan

Brian Dolan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210358260
    Abstract: Gaming machines cabinets are disclosed that are designed and constructed to resist viruses, bacteria and fungi and that are generally configured to curb the spread of infectious diseases.
    Type: Application
    Filed: May 3, 2021
    Publication date: November 18, 2021
    Inventors: Georg M. WASHINGTON, Harry INGLETT, Brian DOLAN
  • Patent number: 10453673
    Abstract: Methods of removing metal from a portion of a substrate include exposing the substrate to a reducing environment comprising at least one reducing agent and at least one oxidizing agent, determining whether metal remaining on the portion of the substrate is less than or equal to a particular level, and exposing the substrate to an oxidizing environment comprising at least one oxidizing agent and at least one reducing agent if the metal remaining on the portion of the substrate is deemed to be greater than the particular level.
    Type: Grant
    Filed: January 11, 2018
    Date of Patent: October 22, 2019
    Assignee: Micron Technology, Inc.
    Inventors: Brian Dolan, Robert J. Hanson, Chan Lim
  • Publication number: 20180138033
    Abstract: Methods of removing metal from a portion of a substrate include exposing the substrate to a reducing environment comprising at least one reducing agent and at least one oxidizing agent, determining whether metal remaining on the portion of the substrate is less than or equal to a particular level, and exposing the substrate to an oxidizing environment comprising at least one oxidizing agent and at least one reducing agent if the metal remaining on the portion of the substrate is deemed to be greater than the particular level.
    Type: Application
    Filed: January 11, 2018
    Publication date: May 17, 2018
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: Brian Dolan, Robert J. Hanson, Chan Lim
  • Patent number: 9887077
    Abstract: Methods of removing metal from a portion of a substrate are useful in integrated circuit fabrication. Methods include exposing the substrate to an oxidizing environment comprising at least one oxidizing agent and at least one reducing agent, determining whether metal remaining on the portion of the substrate is less than or equal to a particular level, and if the metal remaining on the portion of the substrate is deemed to be greater than the particular level, exposing the substrate to a reducing environment comprising at least one reducing agent and at least one oxidizing agent.
    Type: Grant
    Filed: March 15, 2016
    Date of Patent: February 6, 2018
    Assignee: Micron Technology, Inc.
    Inventors: Brian Dolan, Robert J. Hanson, Chan Lim
  • Publication number: 20170372233
    Abstract: In embodiments of the present invention improved capabilities are described for developing, training, validating and deploying discovery avatars embodying mathematical models that may be used for document and data discovery and deployed within large data repositories. For example, an avatar may be constructed by machine learning processes, including by processing information related to what types of information analysts find useful in large data sets. Once constructed, an avatar may be deployed as an aid to human intuition in a wide range of analytical processes, such as related to national security, enterprise management (e.g., programs related to sales, marketing, product, promotions, placement, pricing and the like), dispute resolution (including litigation), forensic analysis, criminal, administrative, civil and private investigations, scientific investigations, research and development, and a wide range of others.
    Type: Application
    Filed: August 21, 2017
    Publication date: December 28, 2017
    Applicant: GCP IP Holdings I, LLC
    Inventor: Brian Dolan
  • Patent number: 9740987
    Abstract: In embodiments of the present invention improved capabilities are described for developing, training, validating and deploying discovery avatars embodying mathematical models that may be used for document and data discovery and deployed within large data repositories. For example, an avatar may be constructed by machine learning processes, including by processing information related to what types of information analysts find useful in large data sets. Once constructed, an avatar may be deployed as an aid to human intuition in a wide range of analytical processes, such as related to national security, enterprise management (e.g., programs related to sales, marketing, product, promotions, placement, pricing and the like), dispute resolution (including litigation), forensic analysis, criminal, administrative, civil and private investigations, scientific investigations, research and development, and a wide range of others.
    Type: Grant
    Filed: April 14, 2015
    Date of Patent: August 22, 2017
    Assignee: GCP IP Holdings I, LLC
    Inventor: Brian Dolan
  • Publication number: 20160196967
    Abstract: Methods of removing metal from a portion of a substrate are useful in integrated circuit fabrication. Methods include exposing the substrate to an oxidizing environment comprising at least one oxidizing agent and at least one reducing agent, determining whether metal remaining on the portion of the substrate is less than or equal to a particular level, and if the metal remaining on the portion of the substrate is deemed to be greater than the particular level, exposing the substrate to a reducing environment comprising at least one reducing agent and at least one oxidizing agent.
    Type: Application
    Filed: March 15, 2016
    Publication date: July 7, 2016
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: Brian Dolan, Robert J. Hanson, Chan Lim
  • Patent number: 9293319
    Abstract: Methods of removing metal from a portion of a substrate are useful in integrated circuit fabrication. Methods include exposing the substrate to an oxidizing environment comprising at least one oxidizing agent and at least one reducing agent, and exposing the substrate to a reducing environment comprising at least one reducing agent and at least one oxidizing agent.
    Type: Grant
    Filed: March 9, 2011
    Date of Patent: March 22, 2016
    Assignee: Micron Technology, Inc.
    Inventors: Brian Dolan, Robert J. Hanson, Chan Lim
  • Publication number: 20150220854
    Abstract: In embodiments of the present invention improved capabilities are described for developing, training, validating and deploying discovery avatars embodying mathematical models that may be used for document and data discovery and deployed within large data repositories.
    Type: Application
    Filed: April 14, 2015
    Publication date: August 6, 2015
    Inventor: Brian Dolan
  • Patent number: 8507387
    Abstract: Some embodiments include methods of removing noble metal-containing particles from over a substrate. The substrate is exposed to a composition that reduces adhesion between the noble metal-containing particles and the substrate, and simultaneously the substrate is spun to sweep at least some of the noble metal-containing particles off from the substrate. Some embodiments include methods in which tunnel dielectric material is formed across a semiconductor wafer. Metallic nanoparticles are formed across the tunnel dielectric material. A stack of two or more different materials is formed over the metallic nanoparticles. A portion of the stack is covered with a protective mask while another portion of the stack is left unprotected. The unprotected portion of the stack is removed to expose some of the metallic nanoparticles. The semiconductor wafer to is subjected to etchant suitable to undercut at least some of the exposed metallic nanoparticles, and simultaneously the semiconductor wafer is spun.
    Type: Grant
    Filed: May 14, 2012
    Date of Patent: August 13, 2013
    Assignee: Micron Technology, Inc.
    Inventors: Fatma Arzum Simsek-Ege, Brian Dolan
  • Publication number: 20120303559
    Abstract: In embodiments of the present invention improved capabilities are described for developing, training, validating and deploying discovery avatars embodying mathematical models that may be used for document and data discovery and deployed within large data repositories.
    Type: Application
    Filed: May 25, 2012
    Publication date: November 29, 2012
    Applicant: CTC TECH CORP.
    Inventor: Brian Dolan
  • Publication number: 20120231561
    Abstract: Methods of removing metal from a portion of a substrate are useful in integrated circuit fabrication. Methods include exposing the substrate to an oxidizing environment comprising at least one oxidizing agent and at least one reducing agent, and exposing the substrate to a reducing environment comprising at least one reducing agent and at least one oxidizing agent.
    Type: Application
    Filed: March 9, 2011
    Publication date: September 13, 2012
    Inventors: Brian Dolan, Robert J. Hanson, Chan Lim
  • Publication number: 20120225562
    Abstract: Some embodiments include methods of removing noble metal-containing particles from over a substrate. The substrate is exposed to a composition that reduces adhesion between the noble metal-containing particles and the substrate, and simultaneously the substrate is spun to sweep at least some of the noble metal-containing particles off from the substrate. Some embodiments include methods in which tunnel dielectric material is formed across a semiconductor wafer. Metallic nanoparticles are formed across the tunnel dielectric material. A stack of two or more different materials is formed over the metallic nanoparticles. A portion of the stack is covered with a protective mask while another portion of the stack is left unprotected. The unprotected portion of the stack is removed to expose some of the metallic nanoparticles. The semiconductor wafer to is subjected to etchant suitable to undercut at least some of the exposed metallic nanoparticles, and simultaneously the semiconductor wafer is spun.
    Type: Application
    Filed: May 14, 2012
    Publication date: September 6, 2012
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: Fatma Arzum Simsek-Ege, Brian Dolan
  • Patent number: 8242008
    Abstract: Some embodiments include methods of removing noble metal-containing particles from over a substrate. The substrate is exposed to a composition that reduces adhesion between the noble metal-containing particles and the substrate, and simultaneously the substrate is spun to sweep at least some of the noble metal-containing particles off from the substrate. Some embodiments include methods in which tunnel dielectric material is formed across a semiconductor wafer. Metallic nanoparticles are formed across the tunnel dielectric material. A stack of two or more different materials is formed over the metallic nanoparticles. A portion of the stack is covered with a protective mask while another portion of the stack is left unprotected. The unprotected portion of the stack is removed to expose some of the metallic nanoparticles. The semiconductor wafer to is subjected to etchant suitable to undercut at least some of the exposed metallic nanoparticles, and simultaneously the semiconductor wafer is spun.
    Type: Grant
    Filed: May 18, 2009
    Date of Patent: August 14, 2012
    Assignee: Micron Technology, Inc.
    Inventors: Fatma Arzum Simsek-Ege, Brian Dolan
  • Patent number: 8173507
    Abstract: Methods include forming a charge storage transistor gate stack over semiconductive material. One such stack includes a tunnel dielectric, charge storage material over the tunnel dielectric, a high-k dielectric over the charge storage material, and conductive control gate material over the high-k dielectric. The stack is etched at least to the tunnel dielectric to form a plurality of charge storage transistor gate lines over the semiconductive material. Individual of the gate lines have laterally projecting feet which include the high-k dielectric. After etching the stack to form the gate lines, ions are implanted into an implant region which includes the high-k dielectric of the laterally projecting feet. The ions are chemically inert to the high-k dielectric. The ion implanted high-k dielectric of the projecting feet is etched selectively relative to portions of the high-k dielectric outside of the implant region.
    Type: Grant
    Filed: June 22, 2010
    Date of Patent: May 8, 2012
    Assignee: Micron Technology, Inc.
    Inventors: Chan Lim, Jennifer Lequn Liu, Brian Dolan, Saurabh Keshav, Hongbin Zhu
  • Publication number: 20110312171
    Abstract: Methods include forming a charge storage transistor gate stack over semiconductive material. One such stack includes a tunnel dielectric, charge storage material over the tunnel dielectric, a high-k dielectric over the charge storage material, and conductive control gate material over the high-k dielectric. The stack is etched at least to the tunnel dielectric to form a plurality of charge storage transistor gate lines over the semiconductive material. Individual of the gate lines have laterally projecting feet which include the high-k dielectric. After etching the stack to form the gate lines, ions are implanted into an implant region which includes the high-k dielectric of the laterally projecting feet. The ions are chemically inert to the high-k dielectric. The ion implanted high-k dielectric of the projecting feet is etched selectively relative to portions of the high-k dielectric outside of the implant region.
    Type: Application
    Filed: June 22, 2010
    Publication date: December 22, 2011
    Inventors: Chan Lim, Jennifer Lequn Liu, Brian Dolan, Saurabh Keshav, Hongbin Zhu
  • Publication number: 20100291764
    Abstract: Some embodiments include methods of removing noble metal-containing particles from over a substrate. The substrate is exposed to a composition that reduces adhesion between the noble metal-containing particles and the substrate, and simultaneously the substrate is spun to sweep at least some of the noble metal-containing particles off from the substrate. Some embodiments include methods in which tunnel dielectric material is formed across a semiconductor wafer. Metallic nanoparticles are formed across the tunnel dielectric material. A stack of two or more different materials is formed over the metallic nanoparticles. A portion of the stack is covered with a protective mask while another portion of the stack is left unprotected. The unprotected portion of the stack is removed to expose some of the metallic nanoparticles. The semiconductor wafer to is subjected to etchant suitable to undercut at least some of the exposed metallic nanoparticles, and simultaneously the semiconductor wafer is spun.
    Type: Application
    Filed: May 18, 2009
    Publication date: November 18, 2010
    Inventors: Fatma Arzum Simsek-Ege, Brian Dolan
  • Publication number: 20080154717
    Abstract: A system and method are disclosed for a publisher scoring algorithm. Various factors or variables are analyzed for publishers to determine a score associated with the publishers. The score may be a reflection of the success or value a publisher provides to an advertisement provider or an advertiser.
    Type: Application
    Filed: December 22, 2006
    Publication date: June 26, 2008
    Inventors: Qasim Saifee, Steve Dang, Brian Dolan
  • Patent number: D954848
    Type: Grant
    Filed: October 5, 2019
    Date of Patent: June 14, 2022
    Assignee: AKKADIAN ENTERPRISES
    Inventors: Ambreese Hill, Brian Dolan, Georg M Washington