Patents by Inventor Brian E. Goodlin

Brian E. Goodlin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190206785
    Abstract: An electronic device comprises: a molybdenum layer; a bond pad formed on the molybdenum layer, the bond pad comprising aluminum; and a wire bonded to the bond pad, the wire comprising gold.
    Type: Application
    Filed: February 19, 2018
    Publication date: July 4, 2019
    Inventors: Ricky Alan JACKSON, Ting-TA YEN, Brian E. GOODLIN
  • Publication number: 20190169019
    Abstract: A packaged micro-electro-mechanical system (MEMS) device (100) comprises a circuitry chip (101) attached to the pad (110) of a substrate with leads (111), and a MEMS (150) vertically attached to the chip surface by a layer (140) of low modulus silicone compound. On the chip surface, the MEMS device is surrounded by a polyimide ring (130) with a surface phobic to silicone compounds. A dome-shaped glob (160) of cured low modulus silicone material covers the MEMS and the MEMS terminal bonding wire spans (180); the glob is restricted to the chip surface area inside the polyimide ring and has a surface non-adhesive to epoxy-based molding compounds. A package (190) of polymeric molding compound encapsulates the vertical assembly of the glob embedding the MEMS, the circuitry chip, and portions of the substrate; the molding compound is non-adhering to the glob surface yet adhering to all other surfaces.
    Type: Application
    Filed: February 4, 2019
    Publication date: June 6, 2019
    Inventors: Kurt Peter Wachtler, Makoto Yoshino, Ayumu Kuroda, Brian E. Goodlin, Karen Kirmse, Benjamin Cook, Genki Yano, Stuart Jacobsen
  • Patent number: 10233074
    Abstract: A packaged micro-electro-mechanical system (MEMS) device (100) comprises a circuitry chip (101) attached to the pad (110) of a substrate with leads (111), and a MEMS (150) vertically attached to the chip surface by a layer (140) of low modulus silicone compound. On the chip surface, the MEMS device is surrounded by a polyimide ring (130) with a surface phobic to silicone compounds. A dome-shaped glob (160) of cured low modulus silicone material covers the MEMS and the MEMS terminal bonding wire spans (180); the glob is restricted to the chip surface area inside the polyimide ring and has a surface non-adhesive to epoxy-based molding compounds. A package (190) of polymeric molding compound encapsulates the vertical assembly of the glob embedding the MEMS, the circuitry chip, and portions of the substrate; the molding compound is non-adhering to the glob surface yet adhering to all other surfaces.
    Type: Grant
    Filed: January 10, 2018
    Date of Patent: March 19, 2019
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Kurt Peter Wachtler, Makoto Yoshino, Ayumu Kuroda, Brian E. Goodlin, Karen Kirmse, Benjamin Cook, Genki Yano, Stuart Jacobsen
  • Patent number: 10009001
    Abstract: Method of forming a termination angle in a titanium tungsten layer include providing a titanium tungsten layer and applying a photo resist material to the titanium tungsten layer. The photo resist material is exposed under a defocus condition to generate a resist mask, wherein an edge of the exposed photo resist material corresponds to the sloped termination. The titanium tungsten layer is etched with an etching material, wherein the etching material at least partially etches the photo resist material exposed under the defocused condition, and wherein the etching results in the sloped termination in the titanium tungsten layer.
    Type: Grant
    Filed: November 11, 2016
    Date of Patent: June 26, 2018
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Neng Jiang, Maciej Blasiak, Nicholas S. Dellas, Brian E. Goodlin
  • Publication number: 20180127266
    Abstract: A packaged micro-electro-mechanical system (MEMS) device (100) comprises a circuitry chip (101) attached to the pad (110) of a substrate with leads (111), and a MEMS (150) vertically attached to the chip surface by a layer (140) of low modulus silicone compound. On the chip surface, the MEMS device is surrounded by a polyimide ring (130) with a surface phobic to silicone compounds. A dome-shaped glob (160) of cured low modulus silicone material covers the MEMS and the MEMS terminal bonding wire spans (180); the glob is restricted to the chip surface area inside the polyimide ring and has a surface non-adhesive to epoxy-based molding compounds. A package (190) of polymeric molding compound encapsulates the vertical assembly of the glob embedding the MEMS, the circuitry chip, and portions of the substrate; the molding compound is non-adhering to the glob surface yet adhering to all other surfaces.
    Type: Application
    Filed: January 10, 2018
    Publication date: May 10, 2018
    Inventors: Kurt Peter Wachtler, Makoto Yoshino, Ayumu Kuroda, Brian E. Goodlin, Karen Kirmse, Benjamin Cook, Genki Yano, Stuart Jacobsen
  • Patent number: 9896330
    Abstract: A packaged micro-electro-mechanical system (MEMS) device (100) comprises a circuitry chip (101) attached to the pad (110) of a substrate with leads (111), and a MEMS (150) vertically attached to the chip surface by a layer (140) of low modulus silicone compound. On the chip surface, the MEMS device is surrounded by a polyimide ring (130) with a surface phobic to silicone compounds. A dome-shaped glob (160) of cured low modulus silicone material covers the MEMS and the MEMS terminal bonding wire spans (180); the glob is restricted to the chip surface area inside the polyimide ring and has a surface non-adhesive to epoxy-based molding compounds. A package (190) of polymeric molding compound encapsulates the vertical assembly of the glob embedding the MEMS, the circuitry chip, and portions of the substrate; the molding compound is non-adhering to the glob surface yet adhering to all other surfaces.
    Type: Grant
    Filed: April 21, 2016
    Date of Patent: February 20, 2018
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Kurt Peter Wachtler, Makoto Yoshino, Ayumu Kuroda, Brian E. Goodlin, Karen Kirmse, Benjamin Cook, Genki Yano, Stuart Jacobsen
  • Publication number: 20170197823
    Abstract: A packaged micro-electro-mechanical system (MEMS) device (100) comprises a circuitry chip (101) attached to the pad (110) of a substrate with leads (111), and a MEMS (150) vertically attached to the chip surface by a layer (140) of low modulus silicone compound. On the chip surface, the MEMS device is surrounded by a polyimide ring (130) with a surface phobic to silicone compounds. A dome-shaped glob (160) of cured low modulus silicone material covers the MEMS and the MEMS terminal bonding wire spans (180); the glob is restricted to the chip surface area inside the polyimide ring and has a surface non-adhesive to epoxy-based molding compounds. A package (190) of polymeric molding compound encapsulates the vertical assembly of the glob embedding the MEMS, the circuitry chip, and portions of the substrate; the molding compound is non-adhering to the glob surface yet adhering to all other surfaces.
    Type: Application
    Filed: April 21, 2016
    Publication date: July 13, 2017
    Inventors: Kurt Peter Wachtler, Makoto Yoshino, Ayumu Kuroda, Brian E. Goodlin, Karen Kirmse, Benjamin Cook, Genki Yano, Stuart Jacobsen
  • Publication number: 20170178916
    Abstract: A cavity is formed in a semiconductor substrate wherein the width of the cavity is greater than the depth of the cavity and wherein the depth of the cavity is non uniform across the width of the cavity. The cavity may be formed under an electronic device in the semiconductor substrate. The cavity is formed in the substrate by performing a first cavity etch followed by repeated cycles of polymer deposition, cavity etch, and polymer removal.
    Type: Application
    Filed: February 10, 2017
    Publication date: June 22, 2017
    Inventors: Brian E. Goodlin, Karen H. R. Kirmse, Iqbal R. Saraf
  • Publication number: 20170174505
    Abstract: A MEMS IR sensor, with a cavity in a substrate underlapping an overlying layer and a temperature sensing component disposed in the overlying layer over the cavity, may be formed by forming an IR-absorbing sealing layer on the overlying layer so as to cover access holes to the cavity. The sealing layer is may include a photosensitive material, and the sealing layer may be patterned using a photolithographic process to form an IR-absorbing seal. Alternately, the sealing layer may be patterned using a mask and etch process to form the IR-absorbing seal.
    Type: Application
    Filed: March 2, 2017
    Publication date: June 22, 2017
    Inventors: Ricky Alan JACKSON, Walter Baker MEINEL, Kalin Valeriev LAZAROV, Brian E. GOODLIN
  • Patent number: 9607847
    Abstract: A cavity is formed in a semiconductor substrate wherein the width of the cavity is greater than the depth of the cavity and wherein the depth of the cavity is non uniform across the width of the cavity. The cavity may be formed under an electronic device in the semiconductor substrate. The cavity is formed in the substrate by performing a first cavity etch followed by repeated cycles of polymer deposition, cavity etch, and polymer removal.
    Type: Grant
    Filed: December 18, 2015
    Date of Patent: March 28, 2017
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Brian E. Goodlin, Karen H. R. Kirmse, Iqbal R. Saraf
  • Publication number: 20170063325
    Abstract: Method of forming a termination angle in a titanium tungsten layer include providing a titanium tungsten layer and applying a photo resist material to the titanium tungsten layer. The photo resist material is exposed under a defocus condition to generate a resist mask, wherein an edge of the exposed photo resist material corresponds to the sloped termination. The titanium tungsten layer is etched with an etching material, wherein the etching material at least partially etches the photo resist material exposed under the defocused condition, and wherein the etching results in the sloped termination in the titanium tungsten layer.
    Type: Application
    Filed: November 11, 2016
    Publication date: March 2, 2017
    Inventors: Neng Jiang, Maciej Blasiak, Nicholas S. Dellas, Brian E. Goodlin
  • Patent number: 9583336
    Abstract: A microelectronic device with a ferroelectric layer is formed using an MOCVD tool. A substrate is disposed on a susceptor heated to 600° C. to 650° C. A first carrier gas is flowed into a manifold to combine with a plurality of metal organic precursors. The first carrier gas, the metal organic precursors, and a second carrier gas, are flowed through a vaporizer into a chamber of the MOCVD tool, over the substrate. A ratio of a flow rate of the first carrier gas to a flow rate of the metal organic precursors is 250 sccm/milliliter/minute to 500 sccm/milliliter/minute. A ratio of a flow rate of the second carrier gas to a flow rate of the metal organic precursors is 700 sccm/milliliter/minute to 1500 sccm/milliliter/minute. An oxidizing gas is flowed into the chamber over the substrate. The metal organic precursors and the oxidizing gas react to form the ferroelectric layer.
    Type: Grant
    Filed: February 18, 2016
    Date of Patent: February 28, 2017
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Bhaskar Srinivasan, Asad Mahmood Haider, Brian E. Goodlin, Haowen Bu, Roger Charles McDermott
  • Patent number: 9524881
    Abstract: Method of forming a termination angle in a titanium tungsten layer include providing a titanium tungsten layer and applying a photo resist material to the titanium tungsten layer. The photo resist material is exposed under a defocus condition to generate a resist mask, wherein an edge of the exposed photo resist material corresponds to the sloped termination. The titanium tungsten layer is etched with an etching material, wherein the etching material at least partially etches the photo resist material exposed under the defocused condition, and wherein the etching results in the sloped termination in the titanium tungsten layer.
    Type: Grant
    Filed: April 30, 2015
    Date of Patent: December 20, 2016
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Neng Jiang, Maciej Blasiak, Nicholas S. Dellas, Brian E. Goodlin
  • Publication number: 20160322235
    Abstract: Method of forming a termination angle in a titanium tungsten layer include providing a titanium tungsten layer and applying a photo resist material to the titanium tungsten layer. The photo resist material is exposed under a defocus condition to generate a resist mask, wherein an edge of the exposed photo resist material corresponds to the sloped termination. The titanium tungsten layer is etched with an etching material, wherein the etching material at least partially etches the photo resist material exposed under the defocused condition, and wherein the etching results in the sloped termination in the titanium tungsten layer.
    Type: Application
    Filed: April 30, 2015
    Publication date: November 3, 2016
    Inventors: Neng Jiang, Maciej Blasiak, Nicholas S. Dellas, Brian E. Goodlin
  • Patent number: 9305998
    Abstract: Deposition of lead-zirconium-titanate (PZT) ferroelectric material over iridium metal, in the formation of a ferroelectric capacitor in an integrated circuit. The capacitor is formed by the deposition of a lower conductive plate layer having iridium metal as a top layer. The surface of the iridium metal is thermally oxidized, prior to or during the deposition of the PZT material. The resulting iridium oxide at the surface of the iridium metal is very thin, on the order of a few nanometers, which allows the deposited PZT to nucleate according to the crystalline structure of the iridium metal rather than that of iridium oxide. The iridium oxide is also of intermediate stoichiometry (IrO2-x), and reacts with the PZT material being deposited.
    Type: Grant
    Filed: February 7, 2014
    Date of Patent: April 5, 2016
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Bhaskar Srinivasan, Eric H. Warninghoff, Alan Merriam, Haowen Bu, Brian E. Goodlin, Manoj K. Jain
  • Patent number: 9157807
    Abstract: A semiconductor device includes a semiconductor layer (2) and a dielectric stack (3) on the semiconductor layer. A plurality of etchant openings (24-1,2 . . . ) are formed through the dielectric stack (3) for passage of etchant for etching a plurality of overlapping sub-cavities (4-1,2 . . . ), respectively. The etchant is introduced through the etchant openings to etch a composite cavity (4) in the semiconductor layer by simultaneously etching the plurality of overlapping sub-cavities into the semiconductor layer.
    Type: Grant
    Filed: June 24, 2009
    Date of Patent: October 13, 2015
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Walter B. Meinel, Kalin V. Lazarov, Brian E. Goodlin
  • Publication number: 20150246810
    Abstract: A MEMS IR sensor, with a cavity in a substrate underlapping an overlying layer and a temperature sensing component disposed in the overlying layer over the cavity, may be formed by forming an IR-absorbing sealing layer on the overlying layer so as to cover access holes to the cavity. The sealing layer is may include a photosensitive material, and the sealing layer may be patterned using a photolithographic process to form an IR-absorbing seal. Alternately, the sealing layer may be patterned using a mask and etch process to form the IR-absorbing seal.
    Type: Application
    Filed: May 14, 2015
    Publication date: September 3, 2015
    Inventors: Ricky Alan JACKSON, Walter Baker MEINEL, Kalin Valeriev LAZAROV, Brian E. GOODLIN
  • Patent number: 8962350
    Abstract: Multi-step deposition of lead-zirconium-titanate (PZT) ferroelectric material. An initial portion of the PZT material is deposited by metalorganic chemical vapor deposition (MOCVD) at a low deposition rate, for example at a temperature below about 640 deg C. from vaporized liquid precursors of lead, zirconium, and titanium, and a solvent at a collective flow rate below about 1.1 ml/min, in combination with an oxidizing gas. Following deposition of the PZT material at the low flow rate, the remainder of the PZT film is deposited at a high deposition rate, attained by changing one or more of precursor and solvent flow rate, oxygen concentration in the oxidizing gas, A/B ratio of the precursors, temperature, and the like.
    Type: Grant
    Filed: January 30, 2014
    Date of Patent: February 24, 2015
    Assignee: Texas Instruments Incorporated
    Inventors: Bhaskar Srinivasan, Brian E. Goodlin, Haowen Bu, Mark Visokay
  • Publication number: 20140225226
    Abstract: Multi-step deposition of lead-zirconium-titanate (PZT) ferroelectric material. An initial portion of the PZT material is deposited by metalorganic chemical vapor deposition (MOCVD) at a low deposition rate, for example at a temperature below about 640 deg C. from vaporized liquid precursors of lead, zirconium, and titanium, and a solvent at a collective flow rate below about 1.1 ml/min, in combination with an oxidizing gas. Following deposition of the PZT material at the low flow rate, the remainder of the PZT film is deposited at a high deposition rate, attained by changing one or more of precursor and solvent flow rate, oxygen concentration in the oxidizing gas, A/B ratio of the precursors, temperature, and the like.
    Type: Application
    Filed: January 30, 2014
    Publication date: August 14, 2014
    Applicant: Texas Instruments Incorporated
    Inventors: Bhaskar Srinivasan, Brian E. Goodlin, Haowen Bu, Mark Visokay
  • Publication number: 20140227805
    Abstract: Deposition of lead-zirconium-titanate (PZT) ferroelectric material over iridium metal, in the formation of a ferroelectric capacitor in an integrated circuit. The capacitor is formed by the deposition of a lower conductive plate layer having iridium metal as a top layer. The surface of the iridium metal is thermally oxidized, prior to or during the deposition of the PZT material. The resulting iridium oxide at the surface of the iridium metal is very thin, on the order of a few nanometers, which allows the deposited PZT to nucleate according to the crystalline structure of the iridium metal rather than that of iridium oxide. The iridium oxide is also of intermediate stoichiometry (IrO2-x), and reacts with the PZT material being deposited.
    Type: Application
    Filed: February 7, 2014
    Publication date: August 14, 2014
    Applicant: Texas Instruments Incorporated
    Inventors: Bhaskar Srinivasan, Eric H. Warninghoff, Alan Merriam, Haowen Bu, Brian E. Goodlin, Manoj K. Jain