Patents by Inventor Brian E. Goodlin
Brian E. Goodlin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11616011Abstract: An integrated circuit (IC) includes a semiconductor surface layer of a substrate including circuitry formed in the semiconductor surface layer configured together with a Metal-Insulator-Metal (MIM) capacitor. A multi-layer metal stack on the semiconductor surface layer includes a bottom plate contact metal layer including a bottom capacitor plate contact. A first interlevel dielectric (ILD) layer is over the bottom plate contact metal layer. The MIM capacitor includes a trench in the first ILD layer over the bottom capacitor plate contact, wherein the trench is lined by a bottom capacitor plate with a capacitor dielectric layer thereon, and a top capacitor plate on the capacitor dielectric layer. A fill material fills the trench to form a filled trench. A second ILD layer is over the filled trench. A filled via through the second ILD layer provides a connection to the top capacitor plate.Type: GrantFiled: June 28, 2021Date of Patent: March 28, 2023Assignee: Texas Instruments IncorporatedInventors: Mona M. Eissa, Umamaheswari Aghoram, Pushpa Mahalingam, Erich Wesley Kinder, Bhaskar Srinivasan, Brian E. Goodlin
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Patent number: 11498831Abstract: A packaged micro-electro-mechanical system (MEMS) device (100) comprises a circuitry chip (101) attached to the pad (110) of a substrate with leads (111), and a MEMS (150) vertically attached to the chip surface by a layer (140) of low modulus silicone compound. On the chip surface, the MEMS device is surrounded by a polyimide ring (130) with a surface phobic to silicone compounds. A dome-shaped glob (160) of cured low modulus silicone material covers the MEMS and the MEMS terminal bonding wire spans (180); the glob is restricted to the chip surface area inside the polyimide ring and has a surface non-adhesive to epoxy-based molding compounds. A package (190) of polymeric molding compound encapsulates the vertical assembly of the glob embedding the MEMS, the circuitry chip, and portions of the substrate; the molding compound is non-adhering to the glob surface yet adhering to all other surfaces.Type: GrantFiled: July 28, 2020Date of Patent: November 15, 2022Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Kurt Peter Wachtler, Makoto Yoshino, Ayumu Kuroda, Brian E. Goodlin, Karen Kirmse, Benjamin Cook, Genki Yano, Stuart Jacobsen
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Publication number: 20210327802Abstract: An integrated circuit (IC) includes a semiconductor surface layer of a substrate including circuitry formed in the semiconductor surface layer configured together with a Metal-Insulator-Metal (MIM) capacitor. A multi-layer metal stack on the semiconductor surface layer includes a bottom plate contact metal layer including a bottom capacitor plate contact. A first interlevel dielectric (ILD) layer is over the bottom plate contact metal layer. The MIM capacitor includes a trench in the first ILD layer over the bottom capacitor plate contact, wherein the trench is lined by a bottom capacitor plate with a capacitor dielectric layer thereon, and a top capacitor plate on the capacitor dielectric layer. A fill material fills the trench to form a filled trench. A second ILD layer is over the filled trench. A filled via through the second ILD layer provides a connection to the top capacitor plate.Type: ApplicationFiled: June 28, 2021Publication date: October 21, 2021Inventors: Mona M. Eissa, Umamaheswari Aghoram, Pushpa Mahalingam, Erich Wesley Kinder, Bhaskar Srinivasan, Brian E. Goodlin
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Patent number: 11075157Abstract: An integrated circuit (IC) includes a semiconductor surface layer of a substrate including circuitry formed in the semiconductor surface layer configured together with a Metal-Insulator-Metal (MIM) capacitor. A multi-layer metal stack on the semiconductor surface layer includes a bottom plate contact metal layer including a bottom capacitor plate contact. A first interlevel dielectric (ILD) layer is over the bottom plate contact metal layer. The MIM capacitor includes a trench in the first ILD layer over the bottom capacitor plate contact, wherein the trench is lined by a bottom capacitor plate with a capacitor dielectric layer thereon, and a top capacitor plate on the capacitor dielectric layer. A fill material fills the trench to form a filled trench. A second ILD layer is over including the filled trench. A filled via through the second ILD layer provides a contact to a top plate contact on the top capacitor plate.Type: GrantFiled: September 9, 2019Date of Patent: July 27, 2021Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Mona M. Eissa, Umamaheswari Aghoram, Pushpa Mahalingam, Erich Wesley Kinder, Bhaskar Srinivasan, Brian E. Goodlin
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Publication number: 20210074630Abstract: An integrated circuit (IC) includes a semiconductor surface layer of a substrate including circuitry formed in the semiconductor surface layer configured together with a Metal-Insulator-Metal (MIM) capacitor. A multi-layer metal stack on the semiconductor surface layer includes a bottom plate contact metal layer including a bottom capacitor plate contact. A first interlevel dielectric (ILD) layer is over the bottom plate contact metal layer. The MIM capacitor includes a trench in the first ILD layer over the bottom capacitor plate contact, wherein the trench is lined by a bottom capacitor plate with a capacitor dielectric layer thereon, and a top capacitor plate on the capacitor dielectric layer. A fill material fills the trench to form a filled trench. A second ILD layer is over including the filled trench. A filled via through the second ILD layer provides a contact to a top plate contact on the top capacitor plate.Type: ApplicationFiled: September 9, 2019Publication date: March 11, 2021Inventors: Mona M. Eissa, Umamaheswari Aghoram, Pushpa Mahalingam, Erich Wesley Kinder, Bhaskar Srinivasan, Brian E. Goodlin
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Patent number: 10840179Abstract: An electronic device comprises: a molybdenum layer; a bond pad formed on the molybdenum layer, the bond pad comprising aluminum; and a wire bonded to the bond pad, the wire comprising gold.Type: GrantFiled: February 19, 2018Date of Patent: November 17, 2020Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Ricky Alan Jackson, Ting-Ta Yen, Brian E. Goodlin
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Publication number: 20200354214Abstract: A packaged micro-electro-mechanical system (MEMS) device (100) comprises a circuitry chip (101) attached to the pad (110) of a substrate with leads (111), and a MEMS (150) vertically attached to the chip surface by a layer (140) of low modulus silicone compound. On the chip surface, the MEMS device is surrounded by a polyimide ring (130) with a surface phobic to silicone compounds. A dome-shaped glob (160) of cured low modulus silicone material covers the MEMS and the MEMS terminal bonding wire spans (180); the glob is restricted to the chip surface area inside the polyimide ring and has a surface non-adhesive to epoxy-based molding compounds. A package (190) of polymeric molding compound encapsulates the vertical assembly of the glob embedding the MEMS, the circuitry chip, and portions of the substrate; the molding compound is non-adhering to the glob surface yet adhering to all other surfaces.Type: ApplicationFiled: July 28, 2020Publication date: November 12, 2020Inventors: Kurt Peter Wachtler, Makoto Yoshino, Ayumu Kuroda, Brian E. Goodlin, Karen Kirmse, Benjamin Cook, Genki Yano, Stuart Jacobsen
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Patent number: 10723616Abstract: A packaged micro-electro-mechanical system (MEMS) device (100) comprises a circuitry chip (101) attached to the pad (110) of a substrate with leads (111), and a MEMS (150) vertically attached to the chip surface by a layer (140) of low modulus silicone compound. On the chip surface, the MEMS device is surrounded by a polyimide ring (130) with a surface phobic to silicone compounds. A dome-shaped glob (160) of cured low modulus silicone material covers the MEMS and the MEMS terminal bonding wire spans (180); the glob is restricted to the chip surface area inside the polyimide ring and has a surface non-adhesive to epoxy-based molding compounds. A package (190) of polymeric molding compound encapsulates the vertical assembly of the glob embedding the MEMS, the circuitry chip, and portions of the substrate; the molding compound is non-adhering to the glob surface yet adhering to all other surfaces.Type: GrantFiled: February 4, 2019Date of Patent: July 28, 2020Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Kurt Peter Wachtler, Makoto Yoshino, Ayumu Kuroda, Brian E. Goodlin, Karen Kirmse, Benjamin Cook, Genki Yano, Stuart Jacobsen
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Patent number: 10570006Abstract: A MEMS IR sensor, with a cavity in a substrate underlapping an overlying layer and a temperature sensing component disposed in the overlying layer over the cavity, may be formed by forming an IR-absorbing sealing layer on the overlying layer so as to cover access holes to the cavity. The sealing layer is may include a photosensitive material, and the sealing layer may be patterned using a photolithographic process to form an IR-absorbing seal. Alternately, the sealing layer may be patterned using a mask and etch process to form the IR-absorbing seal.Type: GrantFiled: March 2, 2017Date of Patent: February 25, 2020Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Ricky Alan Jackson, Walter Baker Meinel, Kalin Valeriev Lazarov, Brian E. Goodlin
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Patent number: 10526198Abstract: A MEMS IR sensor, with a cavity in a substrate underlapping an overlying layer and a temperature sensing component disposed in the overlying layer over the cavity, may be formed by forming an IR-absorbing sealing layer on the overlying layer so as to cover access holes to the cavity. The sealing layer is may include a photosensitive material, and the sealing layer may be patterned using a photolithographic process to form an IR-absorbing seal. Alternately, the sealing layer may be patterned using a mask and etch process to form the IR-absorbing seal.Type: GrantFiled: March 5, 2012Date of Patent: January 7, 2020Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Ricky Alan Jackson, Walter Baker Meinel, Kalin Valeriev Lazarov, Brian E. Goodlin
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Publication number: 20190206785Abstract: An electronic device comprises: a molybdenum layer; a bond pad formed on the molybdenum layer, the bond pad comprising aluminum; and a wire bonded to the bond pad, the wire comprising gold.Type: ApplicationFiled: February 19, 2018Publication date: July 4, 2019Inventors: Ricky Alan JACKSON, Ting-TA YEN, Brian E. GOODLIN
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Publication number: 20190169019Abstract: A packaged micro-electro-mechanical system (MEMS) device (100) comprises a circuitry chip (101) attached to the pad (110) of a substrate with leads (111), and a MEMS (150) vertically attached to the chip surface by a layer (140) of low modulus silicone compound. On the chip surface, the MEMS device is surrounded by a polyimide ring (130) with a surface phobic to silicone compounds. A dome-shaped glob (160) of cured low modulus silicone material covers the MEMS and the MEMS terminal bonding wire spans (180); the glob is restricted to the chip surface area inside the polyimide ring and has a surface non-adhesive to epoxy-based molding compounds. A package (190) of polymeric molding compound encapsulates the vertical assembly of the glob embedding the MEMS, the circuitry chip, and portions of the substrate; the molding compound is non-adhering to the glob surface yet adhering to all other surfaces.Type: ApplicationFiled: February 4, 2019Publication date: June 6, 2019Inventors: Kurt Peter Wachtler, Makoto Yoshino, Ayumu Kuroda, Brian E. Goodlin, Karen Kirmse, Benjamin Cook, Genki Yano, Stuart Jacobsen
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Patent number: 10233074Abstract: A packaged micro-electro-mechanical system (MEMS) device (100) comprises a circuitry chip (101) attached to the pad (110) of a substrate with leads (111), and a MEMS (150) vertically attached to the chip surface by a layer (140) of low modulus silicone compound. On the chip surface, the MEMS device is surrounded by a polyimide ring (130) with a surface phobic to silicone compounds. A dome-shaped glob (160) of cured low modulus silicone material covers the MEMS and the MEMS terminal bonding wire spans (180); the glob is restricted to the chip surface area inside the polyimide ring and has a surface non-adhesive to epoxy-based molding compounds. A package (190) of polymeric molding compound encapsulates the vertical assembly of the glob embedding the MEMS, the circuitry chip, and portions of the substrate; the molding compound is non-adhering to the glob surface yet adhering to all other surfaces.Type: GrantFiled: January 10, 2018Date of Patent: March 19, 2019Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Kurt Peter Wachtler, Makoto Yoshino, Ayumu Kuroda, Brian E. Goodlin, Karen Kirmse, Benjamin Cook, Genki Yano, Stuart Jacobsen
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Patent number: 10009001Abstract: Method of forming a termination angle in a titanium tungsten layer include providing a titanium tungsten layer and applying a photo resist material to the titanium tungsten layer. The photo resist material is exposed under a defocus condition to generate a resist mask, wherein an edge of the exposed photo resist material corresponds to the sloped termination. The titanium tungsten layer is etched with an etching material, wherein the etching material at least partially etches the photo resist material exposed under the defocused condition, and wherein the etching results in the sloped termination in the titanium tungsten layer.Type: GrantFiled: November 11, 2016Date of Patent: June 26, 2018Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Neng Jiang, Maciej Blasiak, Nicholas S. Dellas, Brian E. Goodlin
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Publication number: 20180127266Abstract: A packaged micro-electro-mechanical system (MEMS) device (100) comprises a circuitry chip (101) attached to the pad (110) of a substrate with leads (111), and a MEMS (150) vertically attached to the chip surface by a layer (140) of low modulus silicone compound. On the chip surface, the MEMS device is surrounded by a polyimide ring (130) with a surface phobic to silicone compounds. A dome-shaped glob (160) of cured low modulus silicone material covers the MEMS and the MEMS terminal bonding wire spans (180); the glob is restricted to the chip surface area inside the polyimide ring and has a surface non-adhesive to epoxy-based molding compounds. A package (190) of polymeric molding compound encapsulates the vertical assembly of the glob embedding the MEMS, the circuitry chip, and portions of the substrate; the molding compound is non-adhering to the glob surface yet adhering to all other surfaces.Type: ApplicationFiled: January 10, 2018Publication date: May 10, 2018Inventors: Kurt Peter Wachtler, Makoto Yoshino, Ayumu Kuroda, Brian E. Goodlin, Karen Kirmse, Benjamin Cook, Genki Yano, Stuart Jacobsen
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Patent number: 9896330Abstract: A packaged micro-electro-mechanical system (MEMS) device (100) comprises a circuitry chip (101) attached to the pad (110) of a substrate with leads (111), and a MEMS (150) vertically attached to the chip surface by a layer (140) of low modulus silicone compound. On the chip surface, the MEMS device is surrounded by a polyimide ring (130) with a surface phobic to silicone compounds. A dome-shaped glob (160) of cured low modulus silicone material covers the MEMS and the MEMS terminal bonding wire spans (180); the glob is restricted to the chip surface area inside the polyimide ring and has a surface non-adhesive to epoxy-based molding compounds. A package (190) of polymeric molding compound encapsulates the vertical assembly of the glob embedding the MEMS, the circuitry chip, and portions of the substrate; the molding compound is non-adhering to the glob surface yet adhering to all other surfaces.Type: GrantFiled: April 21, 2016Date of Patent: February 20, 2018Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Kurt Peter Wachtler, Makoto Yoshino, Ayumu Kuroda, Brian E. Goodlin, Karen Kirmse, Benjamin Cook, Genki Yano, Stuart Jacobsen
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Publication number: 20170197823Abstract: A packaged micro-electro-mechanical system (MEMS) device (100) comprises a circuitry chip (101) attached to the pad (110) of a substrate with leads (111), and a MEMS (150) vertically attached to the chip surface by a layer (140) of low modulus silicone compound. On the chip surface, the MEMS device is surrounded by a polyimide ring (130) with a surface phobic to silicone compounds. A dome-shaped glob (160) of cured low modulus silicone material covers the MEMS and the MEMS terminal bonding wire spans (180); the glob is restricted to the chip surface area inside the polyimide ring and has a surface non-adhesive to epoxy-based molding compounds. A package (190) of polymeric molding compound encapsulates the vertical assembly of the glob embedding the MEMS, the circuitry chip, and portions of the substrate; the molding compound is non-adhering to the glob surface yet adhering to all other surfaces.Type: ApplicationFiled: April 21, 2016Publication date: July 13, 2017Inventors: Kurt Peter Wachtler, Makoto Yoshino, Ayumu Kuroda, Brian E. Goodlin, Karen Kirmse, Benjamin Cook, Genki Yano, Stuart Jacobsen
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Publication number: 20170174505Abstract: A MEMS IR sensor, with a cavity in a substrate underlapping an overlying layer and a temperature sensing component disposed in the overlying layer over the cavity, may be formed by forming an IR-absorbing sealing layer on the overlying layer so as to cover access holes to the cavity. The sealing layer is may include a photosensitive material, and the sealing layer may be patterned using a photolithographic process to form an IR-absorbing seal. Alternately, the sealing layer may be patterned using a mask and etch process to form the IR-absorbing seal.Type: ApplicationFiled: March 2, 2017Publication date: June 22, 2017Inventors: Ricky Alan JACKSON, Walter Baker MEINEL, Kalin Valeriev LAZAROV, Brian E. GOODLIN
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Publication number: 20170178916Abstract: A cavity is formed in a semiconductor substrate wherein the width of the cavity is greater than the depth of the cavity and wherein the depth of the cavity is non uniform across the width of the cavity. The cavity may be formed under an electronic device in the semiconductor substrate. The cavity is formed in the substrate by performing a first cavity etch followed by repeated cycles of polymer deposition, cavity etch, and polymer removal.Type: ApplicationFiled: February 10, 2017Publication date: June 22, 2017Inventors: Brian E. Goodlin, Karen H. R. Kirmse, Iqbal R. Saraf
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Patent number: 9607847Abstract: A cavity is formed in a semiconductor substrate wherein the width of the cavity is greater than the depth of the cavity and wherein the depth of the cavity is non uniform across the width of the cavity. The cavity may be formed under an electronic device in the semiconductor substrate. The cavity is formed in the substrate by performing a first cavity etch followed by repeated cycles of polymer deposition, cavity etch, and polymer removal.Type: GrantFiled: December 18, 2015Date of Patent: March 28, 2017Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Brian E. Goodlin, Karen H. R. Kirmse, Iqbal R. Saraf