Patents by Inventor Brian Edward Zinn

Brian Edward Zinn has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190006299
    Abstract: An electronic device is formed by providing a substrate having a recess at a top surface. A layer of an organic protective material is formed over the substrate, with the organic protective material extending into the recess. A polishing process is performed on the layer of protective material. The polishing process may remove a portion of an underlying metal layer over the top surface while protecting the underlying metal layer within the recess.
    Type: Application
    Filed: September 5, 2018
    Publication date: January 3, 2019
    Inventors: Jonathan Philip Davis, Andrew Frank Burnett, Brian Edward Zinn
  • Patent number: 10090264
    Abstract: A microelectronic device is formed by providing a substrate having a recess at a top surface, and a liner layer formed over the top surface of the substrate, extending into the recess. A protective layer is formed over the liner layer, extending into the recess. A CMP process removes the protective layer and the liner layer from over the top surface of the substrate, leaving the protective layer and the liner layer in the recess. The protective layer is subsequently removed from the recess, leaving the liner layer in the recess. The substrate may include an interconnect region with a bond pad and a PO layer having an opening which forms the recess; the bond pad is exposed in the recess. The liner layer in the recess may be a metal liner suitable for a subsequently-formed wire bond or bump bond.
    Type: Grant
    Filed: February 16, 2017
    Date of Patent: October 2, 2018
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Jonathan Philip Davis, Andrew Frank Burnett, Brian Edward Zinn
  • Publication number: 20170162526
    Abstract: A microelectronic device is formed by providing a substrate having a recess at a top surface, and a liner layer formed over the top surface of the substrate, extending into the recess. A protective layer is formed over the liner layer, extending into the recess. A CMP process removes the protective layer and the liner layer from over the top surface of the substrate, leaving the protective layer and the liner layer in the recess. The protective layer is subsequently removed from the recess, leaving the liner layer in the recess. The substrate may include an interconnect region with a bond pad and a PO layer having an opening which forms the recess; the bond pad is exposed in the recess. The liner layer in the recess may be a metal liner suitable for a subsequently-formed wire bond or bump bond.
    Type: Application
    Filed: February 16, 2017
    Publication date: June 8, 2017
    Inventors: Jonathan Philip Davis, Andrew Frank Burnett, Brian Edward Zinn
  • Patent number: 9604338
    Abstract: A microelectronic device is formed by providing a substrate having a recess at a top surface, and a liner layer formed over the top surface of the substrate, extending into the recess. A protective layer is formed over the liner layer, extending into the recess. A CMP process removes the protective layer and the liner layer from over the top surface of the substrate, leaving the protective layer and the liner layer in the recess. The protective layer is subsequently removed from the recess, leaving the liner layer in the recess. The substrate may include an interconnect region with a bond pad and a PO layer having an opening which forms the recess; the bond pad is exposed in the recess. The liner layer in the recess may be a metal liner suitable for a subsequently-formed wire bond or bump bond.
    Type: Grant
    Filed: August 4, 2015
    Date of Patent: March 28, 2017
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Jonathan Philip Davis, Andrew Frank Burnett, Brian Edward Zinn
  • Publication number: 20170036317
    Abstract: A microelectronic device is formed by providing a substrate having a recess at a top surface, and a liner layer formed over the top surface of the substrate, extending into the recess. A protective layer is formed over the liner layer, extending into the recess. A CMP process removes the protective layer and the liner layer from over the top surface of the substrate, leaving the protective layer and the liner layer in the recess. The protective layer is subsequently removed from the recess, leaving the liner layer in the recess. The substrate may include an interconnect region with a bond pad and a PO layer having an opening which forms the recess; the bond pad is exposed in the recess. The liner layer in the recess may be a metal liner suitable for a subsequently-formed wire bond or bump bond.
    Type: Application
    Filed: August 4, 2015
    Publication date: February 9, 2017
    Applicant: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Jonathan Philip Davis, Andrew Frank Burnett, Brian Edward Zinn