Abstract: A frequency locked loop (FLL) having an oscillator whose output frequency controls the amount of charge provided by a switched feedback capacitor to a charge integrator whose output voltage controls the frequency of the oscillator. A switched reference capacitor provides a charge to the charge integrator which is a function of a reference frequency, so that the oscillator output frequency is a function of a product of the reference frequency times a ratio of the capacitance of the reference capacitor to the capacitance of the feedback capacitor. Plural reference capacitors, each responsive to a respective reference frequency may be provided so that the oscillator output frequency can be related to the sums or differences of the reference frequencies, the ratios of capacitors, the ratio of the reference voltages or a fixed multiplication factor.