Abstract: A television on a chip (TVOC) system that provides a cost effective approach for providing television functionality on a single integrated circuit chip is disclosed. A TVOC includes the functionality necessary to receive and display television signals in a variety of input and output formats. A TVOC can be used in set-top boxes for cable and satellite television, or directly within a television. All functionality provided can be provided on a single integrated circuit. TVOC includes a data transport module, an IF demodulator, a digital audio engine, an analog audio engine, a digital video engine, and an analog video engine. The TVOC also includes three sets of interfaces including output interfaces, control interfaces and ancillary interfaces. Further features and embodiments provide enhanced functionality and increased efficiencies.

Abstract: A method for securely handling processing of information may include controlling from within a chip, access to at least one portion of an on-chip memory by a plurality of on-chip clients that have pre-determined access to the at least one portion of the on-chip memory. The pre-determined access may be governed by pre-determined access rules that are hard-coded within the chip. At least one of the plurality of on-chip clients may access at least a portion of the on-chip memory. The on-chip memory may be accessible by at least another one of the plurality of on-chip clients. The pre-determined access rules may comprise at least one address range within the on-chip memory corresponding to at least one of the plurality of on-chip clients.

Abstract: A system and method are used to generate pseudo MPEG information from digital video information. An artificial time stamp module and a data transport device can be used to generate the pseudo MPEG information, including associating an artificial time stamp with the digital video information. This pseudo MPEG information can be decoded as MPEG information.

Abstract: A television on a chip (TVOC) system that provides a cost effective approach for providing television functionality on a single integrated circuit chip is disclosed. A TVOC includes the functionality necessary to receive and display television signals in a variety of input and output formats. A TVOC can be used in set-top boxes for cable and satellite television, or directly within a television. All functionality provided can be provided on a single integrated circuit. TVOC includes a data transport module, an IF demodulator, a digital audio engine, an analog audio engine, a digital video engine, and an analog video engine. The TVOC also includes three sets of interfaces including output interfaces, control interfaces and ancillary interfaces. Further features and embodiments provide enhanced functionality and increased efficiencies.

Abstract: A television on a chip (TVOC) system that provides a cost effective approach for providing television functionality on a single integrated circuit chip is disclosed. A TVOC includes the functionality necessary to receive and display television signals in a variety of input and output formats. A TVOC can be used in set-top boxes for cable and satellite television, or directly within a television. All functionality provided can be provided on a single integrated circuit. TVOC includes a data transport module, an IF demodulator, a digital audio engine, an analog audio engine, a digital video engine, and an analog video engine. The TVOC also includes three sets of interfaces including output interfaces, control interfaces and ancillary interfaces. Further features and embodiments provide enhanced functionality and increased efficiencies.

Abstract: Systems and methods for processing a video signal are disclosed and may include degrading a received video signal utilizing one or more of a plurality of video signal degrading methods. The degraded video signal may be processed to generate an improved video signal. At least a portion of the degraded video signal and a corresponding portion of the improved video signal may be displayed. Random noise may be added to the received video signal to generate the degraded video signal. Noise within the degraded video signal may be reduced to generate the improved video signal utilizing digital noise reduction and/or analog noise reduction. The received video signal may be compressed and decompressed to generate the random noise. The received video signal may be softened to generate the degraded video signal. The degraded video signal may be sharpened to generate the improved video signal.

Abstract: A system and method are used to generate pseudo MPEG information from digital video information. An artificial time stamp module and a data transport device can be used to generate the pseudo MPEG information, including associating an artificial time stamp with the digital video information. This pseudo MPEG information can be decoded as MPEG information.

Abstract: Herein described is a system and method for improving the appearance of video by generating an improved 4:2:2 chroma. The system comprises a 4:2:2 to 4:2:0 chroma regenerator that regenerates 4:2:0 chroma given a received 4:2:2 chroma, and a 4:2:0 to 4:2:2 chroma generator that weaves and interpolates the regenerated 4:2:0 chroma to yield an adjusted 4:2:2 chroma. The system further comprises a blending system used for blending the adjusted 4:2:2 chroma with the received 4:2:2 chroma based on a control input provided by a motion indication signal. The method comprises regenerating a 4:2:0 chroma from a received 4:2:2 chroma using an algorithm. The method further comprises generating an adjusted 4:2:2 chroma using the regenerated 4:2:0 chroma using another algorithm. The method further comprises blending the adjusted 4:2:2 chroma with the received 4:2:2 chroma to generate an improved 4:2:2 chroma.

Abstract: A system and method are used to generate pseudo MPEG information from digital video information received at a digital video input. An artificial time stamp module is used to generated the pseudo MPEG information from associating an artificial time stamp with the digital video information. This pseudo MPEG information is received, for example, at an MPEG signal processor in a set-top box. The MPEG signal processor decodes the pseudo MPEG information and outputs the decoded MPEG information under control of the artificial time stamps.

Abstract: Systems and methods for processing a video signal are disclosed and may include degrading a received video signal utilizing one or more of a plurality of video signal degrading methods. The degraded video signal may be processed to generate an improved video signal. At least a portion of the degraded video signal and a corresponding portion of the improved video signal may be displayed. Random noise may be added to the received video signal to generate the degraded video signal. Noise within the degraded video signal may be reduced to generate the improved video signal utilizing digital noise reduction and/or analog noise reduction. The received video signal may be compressed and decompressed to generate the random noise. The received video signal may be softened to generate the degraded video signal. The degraded video signal may be sharpened to generate the improved video signal.

Abstract: A television on a chip (TVOC) system that provides a cost effective approach for providing television functionality on a single integrated circuit chip is disclosed. A TVOC includes the functionality necessary to receive and display television signals in a variety of input and output formats. A TVOC can be used in set-top boxes for cable and satellite television, or directly within a television. All functionality provided can be provided on a single integrated circuit. TVOC includes a data transport module, an IF demodulator, a digital audio engine, an analog audio engine, a digital video engine, and an analog video engine. The TVOC also includes three sets of interfaces including output interfaces, control interfaces and ancillary interfaces. Further features and embodiments provide enhanced functionality and increased efficiencies.

Abstract: A method and apparatus for an image canceling digital-to-analog converter is disclosed. Up-sampling and noise shaping is used to produce a stream of digital sample values at a relatively higher sampling rate than the sampling rate of the digitized input samples, each higher sampling rate sample having fewer bits than the original samples. The higher sampling rate stream is then distributed for sequential conversion by multiple digital-to-analog converters each operating at a lower sampling rate. The outputs of the converters are then combined to form a combined output signal. Most spectral images normally observed in a standard or conventional DAC are attenuated in the combined output signal of an embodiment in accordance with the present invention. Any spectral images that remain are further from the signal of interest, permitting the use of lower cost filtering.

Abstract: A television on a chip (TVOC) system that provides a cost effective approach for providing television functionality on a single integrated circuit chip is disclosed. A TVOC includes the functionality necessary to receive and display television signals in a variety of input and output formats. A TVOC can be used in set-top boxes for cable and satellite television, or directly within a television. All functionality provided can be provided on a single integrated circuit. TVOC includes a data transport module, an IF demodulator, a digital audio engine, an analog audio engine, a digital video engine, and an analog video engine. The TVOC also includes three sets of interfaces including output interfaces, control interfaces and ancillary interfaces. Further features and embodiments provide enhanced functionality and increased efficiencies.

Abstract: A method and apparatus for an image canceling digital-to-analog converter is disclosed. Up-sampling and noise shaping is used to produce a stream of digital sample values at a relatively higher sampling rate than the sampling rate of the digitized input samples, each higher sampling rate sample having fewer bits than the original samples. The higher sampling rate stream is then distributed for sequential conversion by multiple digital-to-analog converters each operating at a lower sampling rate. The outputs of the converters are then combined to form a combined output signal. Most spectral images normally observed in a standard or conventional DAC are attenuated in the combined output signal of an embodiment in accordance with the present invention. Any spectral images that remain are further from the signal of interest, permitting the use of lower cost filtering.

Abstract: Provided is a system and method for converting digital data audio data audio data that has a predetermined input sample rate, into an analog data signal. A system includes a digital to analog converter (DAC) including a digital processing portion configured to receive as an input the digital audio data and timing information, the timing information being representative of a time base of the input sample rate. The digital processing portion is similarly configured to digitally process the digital audio data and the timing information to produce serialized output data. The DAC also includes an analog processing portion configured to convert serialized data to an analog format. The digital processing portion operates in accordance with at least one clock having a corresponding clock rate wherein the corresponding clock rate is unrelated to the input sample rate.

Abstract: A method and apparatus for an image canceling digital-to-analog converter is disclosed. Up-sampling and noise shaping is used to produce a stream of digital sample values at a relatively higher sampling rate than the sampling rate of the digitized input samples, each higher sampling rate sample having fewer bits than the original samples. The higher sampling rate stream is then distributed for sequential conversion by multiple digital-to-analog converters each operating at a lower sampling rate. The outputs of the converters are then combined to form a combined output signal. Most spectral images normally observed in a standard or conventional DAC are attenuated in the combined output signal of an embodiment in accordance with the present invention. Any spectral images that remain are further from the signal of interest, permitting the use of lower cost filtering.

Abstract: Clock cycle simulation involves modeling of clock cycles in a hardware module with a software model. Each simulated clock cycle involves several individual stages: Start, Execute, and End. During the start stage, output pin values for the model are calculated from an initial state of the module being simulated. Between the start stage and the execution stage, a combinatorial function of the modules outputs can be calculated. These calculated functions may be used as inputs to the modules in the execution stage. Afterwards, during the execute stage, input pin values are received by the model and the next state of the module is calculated based upon the current module state and the input pin values. Finally, during the last stage, i.e., the end stage, the internal state is updated; the internal state is defined as a set of the module's internal register and memory values.

Abstract: An optical disk system is presented which stores disk- and user-specific settings, along with an associated method. The optical disk system includes a disk drive unit for retrieving identification data and encoded video data stored upon an optical disk, an input device for inputting user settings, and a microprocessor memory unit having a non-volatile portion for storing the identification data and the user settings. Information specific to optical disks (e.g., DVDs) and users is stored within the non-volatile portion of the microprocessor memory unit. The user settings may include, for example, spoken language, video display format, audio volume setting, and subtitle language. The user settings may be retrieved and invoked, conveniently allowing a user to view a presentation (e.g., a movie), or to continue viewing an interrupted presentation, without having to reselect viewing and listening preferences. The identification data may include a portion of a title of the optical disk.

Abstract: A memory controller features programmable delay buffers that allow the memory interface signals to be automatically adjusted. By fine tuning the delay values, the memory controller can compensate for impedance characteristics that affect the memory interface timing. The memory controller includes a built-in self test mode, in which it runs a series of memory tests using a plurality of different delay combinations for the delay buffers. After running the built-in self test, the memory controller programs the delay buffers to values which allow the memory transactions to occur without errors, ensuring optimal memory interface timing.