Abstract: A method of forming interconnects in a semiconductor device is provided. A mask including first and second openings is formed over a non-conductive structure. An etch is performed through the mask openings to define (a) a via trench having a via trench width and (b) an interconnect trench having a smaller width than the via trench width. A fill layer is deposited over the structure and (a) fills only a partial width of the via trench to thereby define via trench cavity and (b) fills the full width of the interconnect trench. A further etch is performed through the via trench cavity to form a via opening extending downwardly from the via trench. The remaining fill layer material is removed. The interconnect trench, via trench, and via opening are metallized to form a trench interconnect, a via interconnect, and a via extending downwardly from the via interconnect.

Abstract: A method for manufacturing a semiconductor die may have the steps of:—Providing a semiconductor substrate;—Processing the substrate to a point where shallow trench isolation (STI) can be formed;—Depositing at least one underlayer having a predefined thickness on the wafer;—Depositing a masking layer on top of the underlayer;—Shaping the masking layer to have areas of predefined depths;—Applying a photolithograthy process to expose all the areas where the trenches are to be formed; and—Etching the wafer to form silicon trenches wherein the depth of a trench depends on the location with respect to the masking layer area.

Abstract: A method for manufacturing a semiconductor die may have the steps of:—Providing a semiconductor substrate;—Processing the substrate to a point where shallow trench isolation (STI) can be formed;—Depositing at least one underlayer having a predefined thickness on the wafer;—Depositing a masking layer on top of the underlayer;—Shaping the masking layer to have areas of predefined depths;—Applying a photolithograthy process to expose all the areas where the trenches are to be formed; and—Etching the wafer to form silicon trenches wherein the depth of a trench depends on the location with respect to the masking layer area.