Abstract: An electrical interface on a circuit board is disclosed for electrically connecting the circuit board to a connector to reduce reflections and impedance mismatch and increase power transfer from the connector to the signal path of the circuit board. The signal interface includes a signal conductor including a signal pad configured to connect to a connector pin and a waveguide section extending from the signal pad. The waveguide narrows from a signal pad width to connect to a microstrip conductor. A first ground section is spaced rightward from the signal conductor such that the inner edge of the first ground section, angles in correspondence with the narrowing of the waveguide to generally track an outer right edge of the waveguide. A second ground section is spaced leftward from the signal conductor and configured generally similarly to the first ground section.

Abstract: An electrical interface on a circuit board is disclosed for electrically connecting the circuit board to a connector to reduce reflections and impedance mismatch and increase power transfer from the connector to the signal path of the circuit board. The signal interface includes a signal conductor including a signal pad configured to connect to a connector pin and a waveguide section extending from the signal pad. The waveguide narrows from a signal pad width to connect to a microstrip conductor. A first ground section is spaced rightward from the signal conductor such that the inner edge of the first ground section, angles in correspondence with the narrowing of the waveguide to generally track an outer right edge of the waveguide. A second ground section is spaced leftward from the signal conductor and configured generally similarly to the first ground section.

Abstract: Various systems and methods for automatic data rate detection are provided. In one embodiment, a system is provided that includes a clock and data recovery circuit embodied in a first integrated circuit, the clock and data recovery circuit being configured to re-clock a data stream. The system also includes an automatic rate detection system embodied in a second integrated circuit, where the first integrated circuit is in data communication with the second integrated circuit. Also, the automatic rate detection system is configured to determine a data rate of the data stream upon identifying a transition in the data rate of the data stream based upon the state of the at least one status flag received from the clock and data recovery circuit.

Abstract: Various systems and methods for automatic data rate detection are provided. In one embodiment, a system is provided that includes a clock and data recovery circuit embodied in a first integrated circuit, the clock and data recovery circuit being configured to re-clock a data stream. The system also includes an automatic rate detection system embodied in a second integrated circuit, where the first integrated circuit is in data communication with the second integrated circuit. Also, the automatic rate detection system is configured to determine a data rate of the data stream upon identifying a transition in the data rate of the data stream based upon the state of the at least one status flag received from the clock and data recovery circuit.