Patents by Inventor Brian J. Campell

Brian J. Campell has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Fast L1 flush mechanism
    Publication number: 20080077813
    Abstract: In one embodiment, a processor comprises a data cache configured to store a plurality of cache blocks and a control unit coupled to the data cache. The control unit is configured to flush the plurality of cache blocks from the data cache responsive to an indication that the processor is to transition to a low power state in which one or more clocks for the processor are inhibited.
    Type: Application
    Filed: September 22, 2006
    Publication date: March 27, 2008
    Applicant: P.A. Semi, Inc.
    Inventors: James B. Keller, Tse-Yu Yeh, Ramesh Gunna, Brian J. Campell