Patents by Inventor Brian J.D. Barrick

Brian J.D. Barrick has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Low latency execution of floating-point record form instructions
    Patent number: 10996953
    Abstract: A computer processing system is provided. The computer processing system includes a processor configured to execute a record form instruction cracked into two internal instructions. A first one of the two internal instructions executes out-of-order to compute a target register and a second one of the two internal instructions executes in-order to compute a condition register (CR) to improve a processing speed of the record form instruction.
    Type: Grant
    Filed: September 5, 2019
    Date of Patent: May 4, 2021
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Brian J. D. Barrick, Maarten J. Boersma, Niels Fricke, Michael J. Genden
  • Low latency execution of floating-point record form instructions
    Patent number: 10678547
    Abstract: A computer processing system is provided. The computer processing system includes a processor configured to crack a record form FP instruction into two internal instructions. A first one of the two internal instructions executes out-of-order to compute a target FP register and a second one of the two internal instructions executes in-order to compute a condition register (CR) to improve a processing speed of the record form FP instruction.
    Type: Grant
    Filed: October 27, 2017
    Date of Patent: June 9, 2020
    Assignee: International Business Machines Corporation
    Inventors: Brian J. D. Barrick, Maarten J. Boersma, Niels Fricke, Michael J. Genden
  • Low latency execution of floating-point record form instructions
    Patent number: 10592246
    Abstract: A computer processing system is provided. The computer processing system includes a processor configured to crack a record form FP instruction into two internal instructions. A first one of the two internal instructions executes out-of-order to compute a target FP register and a second one of the two internal instructions executes in-order to compute a condition register (CR) to improve a processing speed of the record form FP instruction.
    Type: Grant
    Filed: July 12, 2017
    Date of Patent: March 17, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Brian J. D. Barrick, Maarten J. Boersma, Niels Fricke, Michael J. Genden
  • LOW LATENCY EXECUTION OF FLOATING-POINT RECORD FORM INSTRUCTIONS
    Publication number: 20190391810
    Abstract: A computer processing system is provided. The computer processing system includes a processor configured to execute a record form instruction cracked into two internal instructions. A first one of the two internal instructions executes out-of-order to compute a target register and a second one of the two internal instructions executes in-order to compute a condition register (CR) to improve a processing speed of the record form instruction.
    Type: Application
    Filed: September 5, 2019
    Publication date: December 26, 2019
    Inventors: Brian J.D. Barrick, Maarten J. Boersma, Niels Fricke, Michael J. Genden
  • Cracked execution of move-to-FPSCR instructions
    Patent number: 10360036
    Abstract: A computer processing system is provided. The computer processing system includes a processor configured to crack a Move-To-FPSCR instruction into two internal instructions. A first one of the two internal instructions executes out-of-order to update a control field and a second one of the two internal instructions executes in-order to compute a trap decision.
    Type: Grant
    Filed: July 12, 2017
    Date of Patent: July 23, 2019
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Brian J. D. Barrick, Maarten J. Boersma, Niels Fricke, Michael J. Genden
  • LOW LATENCY EXECUTION OF FLOATING-POINT RECORD FORM INSTRUCTIONS
    Publication number: 20190018685
    Abstract: A computer processing system is provided. The computer processing system includes a processor configured to crack a record form FP instruction into two internal instructions. A first one of the two internal instructions executes out-of-order to compute a target FP register and a second one of the two internal instructions executes in-order to compute a condition register (CR) to improve a processing speed of the record form FP instruction.
    Type: Application
    Filed: October 27, 2017
    Publication date: January 17, 2019
    Inventors: Brian J.D. Barrick, Maarten J. Boersma, Niels Fricke, Michael J. Genden
  • CRACKED EXECUTION OF MOVE-TO-FPSCR INSTRUCTIONS
    Publication number: 20190018678
    Abstract: A computer processing system is provided. The computer processing system includes a processor configured to crack a Move-To-FPSCR instruction into two internal instructions. A first one of the two internal instructions executes out-of-order to update a control field and a second one of the two internal instructions executes in-order to compute a trap decision.
    Type: Application
    Filed: July 12, 2017
    Publication date: January 17, 2019
    Inventors: Brian J.D. Barrick, Maarten J. Boersma, Niels Fricke, Michael J. Genden
  • LOW LATENCY EXECUTION OF FLOATING-POINT RECORD FORM INSTRUCTIONS
    Publication number: 20190018684
    Abstract: A computer processing system is provided. The computer processing system includes a processor configured to crack a record form FP instruction into two internal instructions. A first one of the two internal instructions executes out-of-order to compute a target FP register and a second one of the two internal instructions executes in-order to compute a condition register (CR) to improve a processing speed of the record form FP instruction.
    Type: Application
    Filed: July 12, 2017
    Publication date: January 17, 2019
    Inventors: Brian J.D. Barrick, Maarten J. Boersma, Niels Fricke, Michael J. Genden