Patents by Inventor Brian J. Daniels
Brian J. Daniels has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20190114517Abstract: A method of correcting print banding in a printer, including initiating the banding correction process, generating prints with various levels of banding based on different levels of voltages applied to the array of jets, receiving an input from the user selecting the preferred print, and adjusting voltage levels applied to jets corresponding to the preferred print.Type: ApplicationFiled: October 17, 2017Publication date: April 18, 2019Inventors: DOUGLAS DEAN DARLING, ERIC HYDE, WALTER SEAN HARRIS, BRIAN J. DANIELS, REID W. GUNNELL, NASSER ALAVIZADEH, LISA M. SCHMIDT, ROBERT MARK JACOBS
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Patent number: 9266336Abstract: An imaging device includes at least one printhead including an aperture plate defining a plurality of apertures, an ink plate and a controller. The at least one printhead is configured to eject liquid ink through the plurality of apertures of the aperture plate. The ink plate is positioned with reference to the aperture plate to enable an ink layer to form between the ink plate and the aperture plate by ink ejected by the printhead. The controller operatively connected to the printhead and configured to operate the printhead to eject the liquid ink to the ink plate to form the link layer.Type: GrantFiled: April 7, 2015Date of Patent: February 23, 2016Assignee: Xerox CorporationInventors: Robert M. Jacobs, Reid W. Gunnell, Brian J. Daniels
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Publication number: 20130311137Abstract: A method including collecting physical measurement data from a sensor. The physical measurement data is converted to radiance data. The radiance data includes a plurality of radiance data points. A detection score is generated by processing the radiance data using a discriminant function. The detection score includes a plurality of detection score points corresponding to the plurality of radiance data points. The discriminant function is derived by a fusion technique using a linear log likelihood ratio principle. A detection map is generated by applying a threshold to the detection score. The detection map includes a plurality of detection map points corresponding to the plurality of radiance data points, each detection map point of the plurality of detection map points includes one of a target-indicating value and a clutter-indicating value. A presence or an absence of a target is determined from the detection map.Type: ApplicationFiled: May 16, 2013Publication date: November 21, 2013Inventors: Brian J. Daniel, Alen Schaum
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Patent number: 8475666Abstract: A toughening agent composition for increasing the hydrophobicity of an organosilicate glass dielectric film when applied to said film. It includes a component capable of alkylating or arylating silanol moieties of the organosilicate glass dielectric film via silylation, and an activating agent selected from the group consisting of an amine, an onium compound and an alkali metal hydroxide.Type: GrantFiled: September 15, 2004Date of Patent: July 2, 2013Assignee: Honeywell International Inc.Inventors: Teresa A. Ramos, Robert R. Roth, Anil S. Bhanap, Paul G. Apen, Denis H. Endisch, Brian J. Daniels, Ananth Naman, Nancy Iwamoto, Roger Y. Leung
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Patent number: 7678712Abstract: The invention concerns a method for applying a surface modification agent composition for organosilicate glass dielectric films. More particularly, the invention pertains to a method for treating a silicate or organosilicate dielectric film on a substrate, which film either comprises silanol moieties or has had at least some previously present carbon containing moieties removed therefrom. The treatment adds carbon containing moieties to the film and/or seals surface pores of the film, when the film is porous.Type: GrantFiled: March 22, 2005Date of Patent: March 16, 2010Assignee: Honeywell International, Inc.Inventors: Anil S. Bhanap, Robert R. Roth, Kikue S. Burnham, Brian J. Daniels, Denis H. Endisch, Ilan Golecki
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Publication number: 20090026924Abstract: A method for forming a substantially transparent nanoporous organosilicate film on a substantially transparent substrate, for use in optical lighting devices such as organic light emitting diodes (OLEDs). The method includes first preparing a composition comprising a silicon containing pre-polymer, a porogen, and a catalyst. The composition is coated onto a substrate which is substantially transparent to visible light, forming a film thereon. The film is then gelled by crosslinking and cured by heating, such that the resulting cured film is substantially transparent to visible light. It is preferred that both the substrate and the nanoporous film are at least 98% transparent to visible light. Optical devices which include the resulting structures of this invention exhibit improved light extraction and illuminance where the nanoporous organosilicate film has a low refractive index in the range of 1.05 to 1.4, serving as an impedance matching layer in such devices.Type: ApplicationFiled: October 31, 2007Publication date: January 29, 2009Inventors: Roger Y. Leung, De-Ling Zhou, Wenya Fan, Peter A. Smith, Paul G. Apen, Brian J. Daniels, Ananth Naman, Teresa A. Ramos, Robert R. Roth
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Patent number: 7153783Abstract: The present invention relates to semiconductor device fabrication and more specifically to a method and material for forming high density shallow trench isolation structures in integrated circuits capable of withstanding wet etch treatments. A silica dielectric film is formed on a substrate. The silica dielectric film has a density of from about 1.0 to about 2.3 g/ml, a SiC:SiO bond ratio of about 0.015 or more, a dielectric constant of about 4.0 or less, a breakdown voltage of about 2 MV/cm or more, and a wet etch resistance in a 100:1 by volume mixture of water and hydrogen fluoride of about 30 ?/minute or less.Type: GrantFiled: July 7, 2004Date of Patent: December 26, 2006Assignee: Honeywell International Inc.Inventors: Victor Lu, Lei Jin, Arlene J. Suedmeyer, Denis H. Endisch, Paul G. Apen, Brian J. Daniels, Deling Zhou, Ananth Naman
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Patent number: 6818552Abstract: A method of forming a microelectronic device while preventing photoresist poisoning. Various layers of conductive metals and dielectric materials are deposited onto a substrate in selective sequence to form an integrated circuit. Vias and trenches are formed throughout the structure by exposing and patterning a photoresist material. The dielectric materials of the insulating layers are protected from the photoresist to prevent chemical reactions which lead to photoresist poisoning. This is done by forming a modified surface layer on the dielectric material by either depositing an additional layer that covers the dielectric material, or by modifying the exposed surface of the dielectric material to a plasma or chemical treatment.Type: GrantFiled: September 13, 2002Date of Patent: November 16, 2004Assignee: Honeywell International, Inc.Inventors: Brian J. Daniels, Jude A. Dunne, Joseph T. Kennedy
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Patent number: 6600637Abstract: A magnetic data storage and retrieval system has a bottom shield, a first half gap positioned on the bottom shield, a sensor layer positioned on the first half gap, a second half gap positioned on the sensor layer; and a top shield positioned on the second half gap. The sensor layer includes a magnetoresistive sensor having sidewalls and a barrier surrounding and in direct contact with the sidewalls of the magnetoresistive sensor.Type: GrantFiled: April 3, 2000Date of Patent: July 29, 2003Assignee: Seagate Technology, L.L.C.Inventors: Hong Wang, Robbee L. Grimm, Matthew T. Johnson, John P. Spangler, Craig A. Ballentine, Qing He, Steven C. Riemer, Brian J. Daniels
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Patent number: 6583047Abstract: A method of forming a microelectronic device while preventing photoresist poisoning. Various layers of conductive metals and dielectric materials are deposited onto a substrate in selective sequence to form an integrated circuit. Vias and trenches are formed throughout the structure by exposing and patterning a photoresist material. The dielectric materials of the insulating layers are protected from the photoresist to prevent chemical reactions which lead to photoresist poisoning. This is done by forming a modified surface layer on the dielectric material by either depositing an additional layer that covers the dielectric material, or by modifying the exposed surface of the dielectric material to a plasma or chemical treatment.Type: GrantFiled: December 26, 2000Date of Patent: June 24, 2003Assignee: Honeywell International, Inc.Inventors: Brian J. Daniels, Jude A. Dunne, Joseph T. Kennedy
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Publication number: 20030032274Abstract: A method, of forming a microelectronic device while preventing photoresist poisoning. Various layers of conductive metals and dielectric materials are deposited onto a substrate in selective sequence to form an integrated circuit. Vias and trenches are formed throughout the structure by exposing and patterning a photoresist material. The dielectric materials of the insulating layers are protected from the photoresist to prevent chemical reactions which lead to photoresist poisoning. This is done by forming a modified surface layer on the dielectric material by either depositing an additional layer that covers the dielectric material, or by modifying the exposed surface of the dielectric material to a plasma or chemical treatment.Type: ApplicationFiled: September 13, 2002Publication date: February 13, 2003Inventors: Brian J. Daniels, Jude A. Dunne, Joseph T. Kennedy
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Publication number: 20020081834Abstract: A method of forming a microelectronic device while preventing photoresist poisoning. Various layers of conductive metals and dielectric materials are deposited onto a substrate in selective sequence to form an integrated circuit. Vias and trenches are formed throughout the structure by exposing and patterning a photoresist material. The dielectric materials of the insulating layers are protected from the photoresist to prevent chemical reactions which lead to photoresist poisoning. This is done by forming a modified surface layer on the dielectric material by either depositing an additional layer that covers the dielectric material, or by modifying the exposed surface of the dielectric material to a plasma or chemical treatment.Type: ApplicationFiled: December 26, 2000Publication date: June 27, 2002Applicant: Honeywell International Inc.Inventors: Brian J. Daniels, Jude A. Dunne, Joseph T. Kennedy
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Patent number: 6004878Abstract: Sidewall spacers, adjacent a gate electrode and source/drain regions of a MOS transistor are formed of a dielectric material that can be etched selectively to the material selected as the isolation dielectric. A layer of silicide forming metal is deposited overlying the MOS transistor and heated, wherein silicide regions are formed where the metal makes contact with silicon, for example, in the gate electrode and source/drain regions. At least a portion of the sidewall spacers are etched-away and silicide stringers, if formed on the spacers, are removed.Type: GrantFiled: February 12, 1998Date of Patent: December 21, 1999Assignee: National Semiconductor CorporationInventors: Michael E. Thomas, Brian J. Daniels