Patents by Inventor Brian J. FANOUS

Brian J. FANOUS has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • PARALLEL IMPLEMENTATION OF MAXIMUM A POSTERIORI PROBABILITY DECODER
    Publication number: 20140046995
    Abstract: A MAP decoder may be implemented in parallel. In one implementation, a device may receive an input array that represents received encoded data and calculate, in parallel, a series of transition matrices from the input array. The device may further calculate, in parallel, products of the cumulative products of the series of transition matrices and an initialization vector. The device may further calculate, in parallel and based on the products of the cumulative products of the series of transition matrices and the initialization vector, an output array that corresponds to a decoded version of the received encoded data in the input array.
    Type: Application
    Filed: October 18, 2013
    Publication date: February 13, 2014
    Applicant: The MathWorks, Inc.
    Inventors: Brian J. FANOUS, Halldor N. Stefansson