Abstract: A power reduced display includes a light source having an available space and configured to generate a backlight, a first display having multiple first pixels, wherein each first pixel is configured to selectively pass and block the backlight, a second display having multiple second pixels. The light source includes a first number of first packages each having a single light-emitting diode. The first number is a largest number of the first packages that fit in the available space of the light source. The first number of the first packages is configured to consume a first power to produce a particular luminance. A second number of second packages each having two light-emitting diodes alternatively fit in the available space and is configured to consume a second power to produce the particular luminance. The first number is greater than the second number. The first power is less than the second power.

Abstract: A power reduced display includes a light source having an available space and configured to generate a backlight, a first display having multiple first pixels, wherein each first pixel is configured to selectively pass and block the backlight, a second display having multiple second pixels. The light source includes a first number of first packages each having a single light-emitting diode. The first number is a largest number of the first packages that fit in the available space of the light source. The first number of the first packages is configured to consume a first power to produce a particular luminance. A second number of second packages each having two light-emitting diodes alternatively fit in the available space and is configured to consume a second power to produce the particular luminance. The first number is greater than the second number. The first power is less than the second power.

Abstract: In a method for reversible assembly of a semiconductor electronic flip-chip device to an electrical interconnecting substrate, a filled thermoplastic adhesive is interposed between an active face of the flip-chip device and a bond site on the substrate. Electrical connection is established between the flip-chip device and the substrate and, generally simultaneously, adhesive bonding between them is established via viscous flow of the filled thermoplastic adhesive above its glass transition temperature, followed by cooling of the adhesive. The adhesive can be reheated to free the flip-chip device of its adhesive bond to the substrate. The filled thermoplastic adhesive includes a low expansion filler in a binder matrix. In accordance with one aspect of the invention, the binder matrix is poly(aryl ether ketone) having the chemical formula ##STR1## where n is from 5 to 150 and R is selected from suitable divalent moieties.

Abstract: An ultrasonic wirebonder has a horn and a transducer for vibrating the horn at a predetermined frequency. A magnet affixed to the horn generates a magnetic field. A coil coupled to the magnet has an output signal induced from the magnetic field moving relative to said coil. A filtering means filters the output signal from the coil to determine the reliably of the ultrasonic bond. An output device is used to monitor the output signal and determine whether the bond is reliable.

Abstract: A process for bonding a flip chip (20), of the type having an active face provided with conductive bumps, to a substrate (22) so that its active face is oriented toward the substrate (22). The flip chip (20) is coupled through a vacuum to the distended end (32) of an ultrasonic horn (30) and then lowered onto the substrate (22) so that the bumps (20b) align with a bonding pattern on the substrate (22). A bias force is applied through the ultrasonic horn (30) to the backside of the flip chip (20), in a direction normal to the substrate (22) so that minimal lateral displacement of the flip chip (20) and the substrate (22) results. The ultrasonic horn (30) is then activated while the bias force is applied such that the ultrasonic energy is isothermally transferred in a direction normal to and across the flip chip (20) to the substrate (22) for creating a diffusion bond therebetween.

Abstract: A process for bonding a flip chip (20), of the type having an active face provided with conductive bumps, to a substrate (22) so that its active face is oriented toward the substrate (22). The flip chip (20) is coupled through a vacuum to the distended end (32) of an ultrasonic horn (30) and then lowered onto the substrate (22) so that the bumps (20b) align with a bonding pattern on the substrate (22). A bias force is applied through the ultrasonic horn (30) to the backside of the flip chip (20), in a direction normal to the substrate (22) so that minimal lateral displacement of the flip chip (20) and the substrate (22) results. The ultrasonic horn (30) is then activated while the bias force is applied such that the ultrasonic energy is isothermally transferred in a direction normal to and across the flip chip (20) to the substrate (22) for creating a diffusion bond therebetween.

Abstract: An apparatus for testing an integrated circuit includes a bond substrate having a location for an integrated circuit. The location on the bond substrate has a plurality of traces around each location. A first fixture holds the bond substrate in a fixed relation to first fixture and holds the integrated circuit in a fixed relation to the first fixture and the bond substrate. A wirebonder forms wirebonds between the traces and the bond pads. An electrical tester provides electrical signals from the traces to the bond pads to verifying the operation of the integrated circuit. A second fixture lifts the bond substrate while the integrated circuit remains held to the first fixture. A vibrator vibrates the first fixture in relation to the second fixture so that the wirebonds are broken at a predetermined location near the bond pad.

Abstract: A test apparatus for testing a know-good die integrated circuit is disclosed. The test apparatus uses conductive straps extending across trenches. The straps align with bond pads on the integrated circuit. When the bond pads are brought into contact with the straps, the straps exert a counterforce in the opposite direction to ensure a good electrical contact while testing the integrated circuit.

Abstract: A process for bonding a flip chip (20) to a substrate (22) comprising positioning the flip chip (20) above the substrate (22). The flip chip (20) has an active face provided with conductive bumps so that its active face is oriented toward the substrate (22). The flip chip (20) is placed on the substrate (22) so that the bumps align with a bonding pattern on the substrate (22). An ultrasonic horn (30) is lowered having a flat surface onto a back side of the flip chip (20). Force is applied through the ultrasonic horn (30) to the back side of the flip chip (20), which is normal to the substrate (22) so that minimal lateral displacement of the flip chip (20) and the substrate (22) results. The ultrasonic horn (30) is then activated while the force is applied so that the ultrasonic energy is isothermally transferred across the flip chip (20) to the substrate (22) and a diffusion bond is created therebetween.

Abstract: Provided is a method and apparatus for electrically detecting the location of bond failure and wire breakage occurring during tensile strength testing of a wire sample having first and second bond foots affixed to respective first and second support pads. The method and apparatus monitors the voltage levels of first and second electrically conductive probes. The first probe has a primary lead in electrical contact with the first support pad and a secondary lead in electrical contact with the first bond foot. Similarly, the second electrically conductive probe has a primary lead in electrical contact with the second support pad and a secondary lead in electrical contact with the second bond foot. Voltage detection circuitry is provided in electrical contact with the first and second probes for detecting the voltage level at each of the respective primary and secondary leads to generate the respective corresponding output signals.