Patents by Inventor Brian J. LePage

Brian J. LePage has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210117357
    Abstract: A computing system includes a computer executing an emulated operating system, the emulated operating system including a multichannel control unit; a plurality of virtual drives accessible to the emulated operating system; and a communication channel, the communication channel connecting the multichannel control unit and the virtual drives through one or more virtual channels. The multichannel control unit sends a first data access request to a virtual drive through the first virtual channel of the communication channel, the multichannel control unit sends a second data access request to a virtual drive through the second virtual channel of the communication channel.
    Type: Application
    Filed: October 21, 2019
    Publication date: April 22, 2021
    Applicant: Unisys Corporation
    Inventors: Brian J. LePage, Carl R. Crandall
  • Publication number: 20210117358
    Abstract: A computing system includes a computer executing an emulated operating system, the emulated operating system including a multichannel control unit; a plurality of virtual drives accessible to the emulated operating system; and a communication channel, the communication channel connecting the multichannel control unit and the virtual drives through one or more virtual channels. The multichannel control unit sends a first data access request to a virtual drive through the first virtual channel of the communication channel, the multichannel control unit sends a second data access request to a virtual drive through the second virtual channel of the communication channel.
    Type: Application
    Filed: February 27, 2020
    Publication date: April 22, 2021
    Applicant: Unisys Corporation
    Inventors: Brian J. LePage, Carl R. Crandall
  • Publication number: 20100211714
    Abstract: Transferring data between system memory and input/output busses involves determining, via a request buffer, a memory-mapped, input/output (I/O) read request targeted for a first-in-first-out (FIFO) I/O device. The read request is targeted to a request address in a prefetchable memory space corresponding to the I/O device. It is determined whether the request address corresponds to an expected address in the prefetchable memory space. The expected address is determined based on one or more previous read requests targeted to the prefetchable memory space. The read request is reordered in the request buffer if the request address does not correspond to the expected address. The read request is fulfilled if the address corresponds to the expected address.
    Type: Application
    Filed: February 13, 2009
    Publication date: August 19, 2010
    Inventor: Brian J. LePage