Patents by Inventor Brian J. Lynch

Brian J. Lynch has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11989394
    Abstract: Devices, methods and graphical user interfaces for manipulating user interfaces based on fingerprint sensor inputs are provided. While a display of an electronic device with a fingerprint sensor displays a first user interface, the device may detect movement of a fingerprint on the fingerprint sensor. In accordance with a determination that the movement of the fingerprint is in a first direction, the device allows navigating through the first user interface, and in accordance with a determination that the movement of the fingerprint is in a second direction different from the first direction, the device allows displaying a second user interface different from the first user interface on the display.
    Type: Grant
    Filed: November 12, 2021
    Date of Patent: May 21, 2024
    Assignee: Apple Inc.
    Inventors: Benjamin J. Pope, Daniel W. Jarvis, Nicholas G. Merz, Scott A. Myers, Michael A. Cretella, Michael Eng, James H. Foster, Terry L. Gilton, Myra Haggerty, Byron B. Han, M. Evans Hankey, Steven P. Hotelling, Brian R. Land, Stephen Brian Lynch, Paul Meade, Mushtaq A. Sarwar, John P. Ternus, Paul M. Thompson, Marcel Van Os, John A. Wright
  • Patent number: 5892272
    Abstract: An integrated circuit includes a ground plane structure which provides a uniform ground potential throughout the integrated circuit and improves its performance. The ground plane structure is carried atop the active circuit elements of the integrated circuit and connects with each of the ground-potential contact pads of the circuit. A method of making the integrated circuit includes applying a ground plane precursor structure over all of the integrated circuit topology, and removing portions of the precursor structure where the ground plane is not desired. A method of providing bump structures at each of the contact pads for use in TAB bonding of the electrical connections of the integrated circuit to a package structure is also set forth.
    Type: Grant
    Filed: June 2, 1997
    Date of Patent: April 6, 1999
    Assignee: LSI Logic Corporation
    Inventor: Brian J. Lynch
  • Patent number: 5482897
    Abstract: An integrated circuit includes a ground plane structure which provides a uniform ground potential throughout the integrated circuit and improves its performance. The ground plane structure is carried atop the active circuit elements of the integrated circuit and connects with each of the ground-potential contact pads of the circuit. A method of making the integrated circuit includes applying a ground plane precursor structure over all of the integrated circuit topology, and removing portions of the precursor structure where the ground plane is not desired. A method of providing bump structures at each of the contact pads for use in TAB bonding of the electrical connections of the integrated circuit to a package structure is also set forth.
    Type: Grant
    Filed: July 19, 1994
    Date of Patent: January 9, 1996
    Assignee: LSI Logic Corporation
    Inventor: Brian J. Lynch